From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48469) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aNBZo-0005B8-Gz for qemu-devel@nongnu.org; Sat, 23 Jan 2016 22:42:57 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aNBZl-0004iH-8o for qemu-devel@nongnu.org; Sat, 23 Jan 2016 22:42:56 -0500 Received: from eddie.linux-mips.org ([148.251.95.138]:51930 helo=cvs.linux-mips.org) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aNBZl-0004i8-0X for qemu-devel@nongnu.org; Sat, 23 Jan 2016 22:42:53 -0500 Received: (from localhost user: 'macro', uid#1010) by eddie.linux-mips.org with ESMTP id S27006587AbcAXDmnDsGl6 (ORCPT ); Sun, 24 Jan 2016 04:42:43 +0100 Date: Sun, 24 Jan 2016 03:42:43 +0000 (GMT) Sender: "Maciej W. Rozycki" From: "Maciej W. Rozycki" In-Reply-To: <1449418309-17202-1-git-send-email-aurelien@aurel32.net> Message-ID: References: <1449418309-17202-1-git-send-email-aurelien@aurel32.net> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Subject: Re: [Qemu-devel] [PATCH] target-mips: silence NaNs for cvt.s.d and cvt.d.s List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Aurelien Jarno Cc: Leon Alrae , qemu-devel@nongnu.org On Sun, 6 Dec 2015, Aurelien Jarno wrote: > cvt.s.d and cvt.d.s are FP operations and thus need to convert input > sNaN into corresponding qNaN. Explicitely use the floatXX_maybe_silence_nan > functions for that as the floatXX_to_floatXX functions do not do that. > > Cc: Leon Alrae > Signed-off-by: Aurelien Jarno > --- > target-mips/op_helper.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c > index d2c98c9..20e79be 100644 > --- a/target-mips/op_helper.c > +++ b/target-mips/op_helper.c > @@ -2545,6 +2545,7 @@ uint64_t helper_float_cvtd_s(CPUMIPSState *env, uint32_t fst0) > uint64_t fdt2; > > fdt2 = float32_to_float64(fst0, &env->active_fpu.fp_status); > + fdt2 = float64_maybe_silence_nan(fdt2); > update_fcr31(env, GETPC()); > return fdt2; > } > @@ -2634,6 +2635,7 @@ uint32_t helper_float_cvts_d(CPUMIPSState *env, uint64_t fdt0) > uint32_t fst2; > > fst2 = float64_to_float32(fdt0, &env->active_fpu.fp_status); > + fst2 = float32_maybe_silence_nan(fst2); > update_fcr31(env, GETPC()); > return fst2; > } FYI, I posted a more general fix to this a while ago, however the review regrettably went nowhere. See the archive of discussion starting at: for details, including the justification and further design consideration. Maciej