From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37348) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bz6OS-00088h-Qe for qemu-devel@nongnu.org; Tue, 25 Oct 2016 14:24:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bz6OR-00045D-Nx for qemu-devel@nongnu.org; Tue, 25 Oct 2016 14:24:12 -0400 Date: Tue, 25 Oct 2016 23:54:00 +0530 (IST) From: P J P In-Reply-To: Message-ID: References: <1477315364-15134-1-git-send-email-ppandit@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Subject: Re: [Qemu-devel] [PATCH v2] char: cadence: check baud rate generator and divider values List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alistair Francis Cc: Qemu Developers , Peter Maydell , qemu-arm , "Edgar E . Iglesias" , Huawei PSIRT Hello Alistair, +-- On Tue, 25 Oct 2016, Alistair Francis wrote --+ | > * Device model for Cadence UART | > + * -> http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf | | Can you say what page/section the UART spec is in the Xilinx TRM? Chapter 19 UART Controller, page 585, 19.2.3 Baud Rate Generator. | I think it might also be worth noting that the datasheet is a Xilinx | datasheet that covers the Cadence UART. Others might be using the IP | as well and might get confused why you are referring to a Xilinx | datasheet. Right, I'll add above section details in the comment. | > + case R_BRGR: /* Baud rate generator */ | > + s->r[offset] = 0x028B; /* default reset value */ | | Is this the correct behavior, or should the write just be ignored? | pg.587 of the TRM doesn't really make this clear, did you find this | somewhere else? True, page 587 does not clearly mention if it should be ignored. But in Appendix B, Register details for 'Baud_rate_gen_reg0' says 0: Disables baud_sample 1: Clock divisor bypass (baud_sample = sel_clk) 2 - 65535: baud_sample | > + case R_BDIV: /* Baud rate divider */ | > + s->r[offset] = 0x0F; Appendix B, Register details for 'Baud_rate_divider_reg0' says 0 - 3: ignored 4 - 255: Baud rate ie. values 0-3 are ignored. But should we avoid writing 's->r[R_BRGR]' & 's->r[R_BDIV]' for these values? That would lead to undefined values being using in 'uart_parameters_setup()', no? Thank you. -- Prasad J Pandit / Red Hat Product Security Team 47AF CE69 3A90 54AA 9045 1053 DD13 3D32 FE5B 041F