Re: [Qemu-devel] Help needed testing on ppc

[BALATON Zoltan <balaton@eik.bme.hu>]

On Wed, 7 May 2014, Tom Musta wrote:
> On 5/6/2014 6:17 PM, BALATON Zoltan wrote:
>> On Tue, 6 May 2014, Tom Musta wrote:
>>> On 5/6/2014 5:03 AM, BALATON Zoltan wrote:
>>>> I'd appreciate some insight and help.
> [snip]
>>> (1) Why is MorphOS using this invalid instruction form?  Would it be easier to fix the OS rather than QEMU?
>>
>> I don't know why is it used. I can ask the MorphOS developers but they did not seem to be too supportive so far and at least one of them expressed that they have no interest supporting other than their officially supported list of hardware at this time. So
>> I assume it is easier to fix QEMU than MorphOS and if it works on a real Mac then it should also work on QEMU's emulation of that Mac hardware.
>>
>>> Is there some undocumented processor behavior that the code is dependent upon (e.g. is it actually expected CR0 to be set?).
>>
>> This is what the testing was supposed to find out but MorphOS seems to run better with the quoted patch so I don't think it depends on any other undocumented behaviour other than ignoring reserved bits but I have no definitive answer.
>
> It still seems to me that setting a reserved instruction bit is an strange thing to do.  It would be nice to at least
> have a justification from MorphOS.  It is possible that no one even knows the answer.

I've tried to ask them about this but all I got as an answer was that 
running on QEMU is not supported so I take it that they don't know or 
won't tell. But it's also very unlikely they would change it in MorphOS so 
it seems it is not easier to fix in MorphOS.

>>> (2) Your patch makes some store instructions compliant with the most recent ISAs but there are many other instructions that are not addressed by the patch.  I think fixing only some will be a future source of confusion.>>
>
> Alex:  do you have an opinion on this?  Are you OK with changing masks for a few stores but not all instructions in general?

I've got a bit further and came across another invalid instruction 
exception:

invalid bits: 02000000 for opcode: 1f - 16 - 0b (7e04caec) 1020574c

I don't know if this is another case of using reserved bits or something 
else though.

Regards,
BALATON Zoltan