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From: Finn Thain <fthain@telegraphics.com.au>
To: "Philippe Mathieu-Daudé" <philmd@redhat.com>
Cc: "Jason Wang" <jasowang@redhat.com>,
	qemu-devel@nongnu.org, qemu-stable@nongnu.org,
	"Hervé Poussineau" <hpoussin@reactos.org>,
	"Aleksandar Rikalo" <aleksandar.rikalo@rt-rk.com>,
	"Laurent Vivier" <laurent@vivier.eu>
Subject: Re: [PATCH v3 13/14] dp8393x: Don't reset Silicon Revision register
Date: Wed, 29 Jan 2020 09:28:34 +1100 (AEDT)	[thread overview]
Message-ID: <alpine.LNX.2.21.1.2001290922330.8@nippy.intranet> (raw)
In-Reply-To: <dcd1dcd2-719c-1db0-e9ce-25d26ed1f6d4@redhat.com>

On Tue, 28 Jan 2020, Philippe Mathieu-Daud? wrote:

> On 1/19/20 11:59 PM, Finn Thain wrote:
> > The jazzsonic driver in Linux uses the Silicon Revision register value
> > to probe the chip. The driver fails unless the SR register contains 4.
> > Unfortunately, reading this register in QEMU usually returns 0 because
> > the s->regs[] array gets wiped after a software reset.
> > 
> > Fixes: bd8f1ebce4 ("net/dp8393x: fix hardware reset")
> > Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
> > ---
> >   hw/net/dp8393x.c | 5 ++++-
> >   1 file changed, 4 insertions(+), 1 deletion(-)
> > 
> > diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c
> > index 1b73a8703b..71af0fad51 100644
> > --- a/hw/net/dp8393x.c
> > +++ b/hw/net/dp8393x.c
> > @@ -591,6 +591,10 @@ static uint64_t dp8393x_read(void *opaque, hwaddr addr,
> > unsigned int size)
> >                   val |= s->cam[s->regs[SONIC_CEP] & 0xf][2* (SONIC_CAP0 -
> > reg)];
> >               }
> >               break;
> > +        /* Read-only */
> > +        case SONIC_SR:
> > +            val = 4; /* only revision recognized by Linux/mips */
> > +            break;
> >           /* All other registers have no special contrainst */
> >           default:
> >               val = s->regs[reg];
> > @@ -971,7 +975,6 @@ static void dp8393x_realize(DeviceState *dev, Error
> > **errp)
> >       qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a);
> >         s->watchdog = timer_new_ns(QEMU_CLOCK_VIRTUAL, dp8393x_watchdog, s);
> > -    s->regs[SONIC_SR] = 0x0004; /* only revision recognized by Linux */
> >         memory_region_init_ram(&s->prom, OBJECT(dev),
> >                              "dp8393x-prom", SONIC_PROM_SIZE, &local_err);
> > 
> 
> Please fix in dp8393x_reset() instead:
> 
> -- >8 --
> diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c
> index cdc2631c0c..65eb9c23a7 100644
> --- a/hw/net/dp8393x.c
> +++ b/hw/net/dp8393x.c
> @@ -862,6 +862,7 @@ static void dp8393x_reset(DeviceState *dev)
>      timer_del(s->watchdog);
> 
>      memset(s->regs, 0, sizeof(s->regs));
> +    s->regs[SONIC_SR] = 0x0004; /* only revision recognized by Linux */
>      s->regs[SONIC_CR] = SONIC_CR_RST | SONIC_CR_STP | SONIC_CR_RXDIS;
>      s->regs[SONIC_DCR] &= ~(SONIC_DCR_EXBUS | SONIC_DCR_LBR);
>      s->regs[SONIC_RCR] &= ~(SONIC_RCR_LB0 | SONIC_RCR_LB1 | SONIC_RCR_BRD |
> SONIC_RCR_RNT);
> @@ -914,7 +915,6 @@ static void dp8393x_realize(DeviceState *dev, Error
> **errp)
>      qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a);
> 
>      s->watchdog = timer_new_ns(QEMU_CLOCK_VIRTUAL, dp8393x_watchdog, s);
> -    s->regs[SONIC_SR] = 0x0004; /* only revision recognized by Linux */
> 
>      memory_region_init_ram(&s->prom, OBJECT(dev),
>                             "dp8393x-prom", SONIC_PROM_SIZE, &local_err);
> ---
> 

This would allow the host to change the value of the Silicon Revision 
register. However, the datasheet says,

    4.3.13 Silicon Revision Register
    This is a 16-bit read only register. It contains information on the 
    current revision of the SONIC. The value of the DP83932CVF revision 
    register is 6h.

I haven't actually tried storing a different value in this register on 
National Semiconductor hardware, but I'm willing to do that test if you 
wish.


  reply	other threads:[~2020-01-28 22:29 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-19 22:59 [PATCH v3 00/14] Fixes for DP8393X SONIC device emulation Finn Thain
2020-01-19 22:59 ` [PATCH v3 08/14] dp8393x: Don't clobber packet checksum Finn Thain
2020-01-19 22:59 ` [PATCH v3 05/14] dp8393x: Update LLFA and CRDA registers from rx descriptor Finn Thain
2020-01-19 22:59 ` [PATCH v3 02/14] dp8393x: Always use 32-bit accesses Finn Thain
2020-01-19 22:59 ` [PATCH v3 07/14] dp8393x: Implement packet size limit and RBAE interrupt Finn Thain
2020-01-19 22:59 ` [PATCH v3 04/14] dp8393x: Have dp8393x_receive() return the packet size Finn Thain
2020-01-28 11:03   ` Philippe Mathieu-Daudé
2020-01-28 11:04     ` Philippe Mathieu-Daudé
2020-01-19 22:59 ` [PATCH v3 10/14] dp8393x: Pad frames to word or long word boundary Finn Thain
2020-01-28 11:02   ` Philippe Mathieu-Daudé
2020-01-19 22:59 ` [PATCH v3 06/14] dp8393x: Clear RRRA command register bit only when appropriate Finn Thain
2020-01-19 22:59 ` [PATCH v3 13/14] dp8393x: Don't reset Silicon Revision register Finn Thain
2020-01-28 11:08   ` Philippe Mathieu-Daudé
2020-01-28 22:28     ` Finn Thain [this message]
2020-01-29  6:53       ` Philippe Mathieu-Daudé
2020-01-29  7:52         ` Finn Thain
2020-01-19 22:59 ` [PATCH v3 14/14] dp8393x: Don't stop reception upon RBE interrupt assertion Finn Thain
2020-01-19 22:59 ` [PATCH v3 03/14] dp8393x: Clean up endianness hacks Finn Thain
2020-01-28 11:02   ` Philippe Mathieu-Daudé
2020-01-19 22:59 ` [PATCH v3 12/14] dp8393x: Always update RRA pointers and sequence numbers Finn Thain
2020-01-19 22:59 ` [PATCH v3 09/14] dp8393x: Use long-word-aligned RRA pointers in 32-bit mode Finn Thain
2020-01-28 11:13   ` Philippe Mathieu-Daudé
2020-01-19 22:59 ` [PATCH v3 11/14] dp8393x: Clear descriptor in_use field to release packet Finn Thain
2020-01-19 22:59 ` [PATCH v3 01/14] dp8393x: Mask EOL bit from descriptor addresses Finn Thain
2020-01-28 11:21   ` Philippe Mathieu-Daudé
2020-01-28 22:57     ` Finn Thain
2020-01-28  0:12 ` [PATCH v3 00/14] Fixes for DP8393X SONIC device emulation Laurent Vivier
2020-01-28  0:25 ` Finn Thain

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