From: "Maciej W. Rozycki" <macro@linux-mips.org>
To: Andi Kleen <andi@firstfloor.org>
Cc: kvm-devel@lists.sourceforge.net, qemu-devel@nongnu.org,
Glauber Costa <gcosta@redhat.com>
Subject: [Qemu-devel] Re: [PATCH] ignore reads to the EOI register.
Date: Thu, 27 Mar 2008 13:36:10 +0000 (GMT) [thread overview]
Message-ID: <alpine.SOC.1.00.0803271330460.29238@piorun> (raw)
In-Reply-To: <87hcesjpqa.fsf@basil.nowhere.org>
On Thu, 27 Mar 2008, Andi Kleen wrote:
> It would be quite possible to make the cycle conditional on a
> cpufeatures.h quirk flag that is only set on P5. Just would need to
> out of line a few functions to avoid code bloat.
Exactly what I suggested at the LKML -- you could even go down to a list
of steppings affected as an RMW cycle is unnecessarily expensive (we only
need interrupt atomicity, but there is no way to disable the LOCK#
implication of "xchg").
Maciej
next prev parent reply other threads:[~2008-03-27 13:36 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-03-27 0:57 [Qemu-devel] [PATCH] ignore reads to the EOI register Glauber Costa
2008-03-27 8:18 ` [Qemu-devel] " Avi Kivity
2008-03-27 11:29 ` Maciej W. Rozycki
[not found] ` <87hcesjpqa.fsf@basil.nowhere.org>
2008-03-27 12:55 ` Avi Kivity
2008-03-27 13:36 ` Maciej W. Rozycki [this message]
2008-03-27 23:39 ` [Qemu-devel] " Aurelien Jarno
2008-03-28 12:59 ` Glauber Costa
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