From: Paolo Bonzini <pbonzini@redhat.com>
To: poletaev <Dmitry.Poletaev@ispras.ru>, qemu-devel@nongnu.org
Cc: Pavel.Dovgaluk@ispras.ru
Subject: Re: [Qemu-devel] [PATCH] target-i386: fix iret emulation correctness
Date: Tue, 7 Jun 2016 14:43:36 +0200 [thread overview]
Message-ID: <b05c47d4-dff2-29f2-e27e-54bc29574069@redhat.com> (raw)
In-Reply-To: <002001d1c0b5$2f5e2e50$8e1a8af0$@Poletaev@ispras.ru>
On 07/06/2016 14:07, poletaev wrote:
>> Second, an IRET with HF_NMI_MASK set can be translated to _only_ the
>> reset of NMI mask followed by end of basic block. An IRET without
>> HF_NMI_MASK instead can be translated the same way as now.
>
> I want to make it like this, but it seems to me it can lead to zero tb size
> and introduce bad side effect. What I do wrong?
>
> case 0xcf: /* iret */
> gen_svm_check_intercept(s, pc_start, SVM_EXIT_IRET);
> if (!s->pe) {
> /* real mode */
> gen_helper_iret_real(cpu_env, tcg_const_i32(dflag - 1));
> set_cc_op(s, CC_OP_EFLAGS);
> } else if (s->vm86) {
> if (s->iopl != 3) {
> if (s->flags & HF_NMI_MASK) {
> gen_reset_hflag(s, HF_NMI_MASK);
> s->pc = pc_start;
> gen_jmp_im(pc_start - s->cs_base);
> } else {
> gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
> }
> } else {
> gen_helper_iret_real(cpu_env, tcg_const_i32(dflag - 1));
> set_cc_op(s, CC_OP_EFLAGS);
> }
> } else {
> gen_helper_iret_protected(cpu_env, tcg_const_i32(dflag - 1),
> tcg_const_i32(s->pc - s->cs_base));
> set_cc_op(s, CC_OP_EFLAGS);
> }
> gen_eob(s);
> break;
I think it's okay to make it count as a one instruction tb, just like a
tb with a "jmp ." instruction.
Thanks,
Paolo
next prev parent reply other threads:[~2016-06-07 12:43 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <875.280801165168$1465286930@news.gmane.org>
2016-06-07 8:19 ` [Qemu-devel] [PATCH] target-i386: fix iret emulation correctness Paolo Bonzini
2016-06-07 12:07 ` poletaev
2016-06-07 12:43 ` Paolo Bonzini [this message]
2016-06-07 8:07 poletaev
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