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From: Thomas Huth <thuth@redhat.com>
To: David Hildenbrand <david@redhat.com>,
	qemu-s390x@nongnu.org, qemu-devel@nongnu.org
Cc: Cornelia Huck <cohuck@redhat.com>, Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH v1 for-2.12 4/5] s390x/tcg: indicate value of TODPR in STCKE
Date: Wed, 6 Dec 2017 16:24:25 +0100	[thread overview]
Message-ID: <b0cfb45c-791b-b1f9-c486-258a4d8fb532@redhat.com> (raw)
In-Reply-To: <20171204125505.29203-5-david@redhat.com>

On 04.12.2017 13:55, David Hildenbrand wrote:
> We were not yet using the value of the TOD Programmable Register.
> 
> Signed-off-by: David Hildenbrand <david@redhat.com>
> ---
>  target/s390x/translate.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/target/s390x/translate.c b/target/s390x/translate.c
> index 48b031894a..8da8610839 100644
> --- a/target/s390x/translate.c
> +++ b/target/s390x/translate.c
> @@ -3897,7 +3897,10 @@ static ExitStatus op_stcke(DisasContext *s, DisasOps *o)
>  {
>      TCGv_i64 c1 = tcg_temp_new_i64();
>      TCGv_i64 c2 = tcg_temp_new_i64();
> +    TCGv_i64 todpr = tcg_temp_new_i64();
>      gen_helper_stck(c1, cpu_env);
> +    /* 16 bit value store in an uint32_t (only valid bits set) */
> +    tcg_gen_ld32u_i64(todpr, cpu_env, offsetof(CPUS390XState, todpr));
>      /* Shift the 64-bit value into its place as a zero-extended
>         104-bit value.  Note that "bit positions 64-103 are always
>         non-zero so that they compare differently to STCK"; we set
> @@ -3905,11 +3908,13 @@ static ExitStatus op_stcke(DisasContext *s, DisasOps *o)
>      tcg_gen_shli_i64(c2, c1, 56);
>      tcg_gen_shri_i64(c1, c1, 8);
>      tcg_gen_ori_i64(c2, c2, 0x10000);
> +    tcg_gen_or_i64(c2, c2, todpr);
>      tcg_gen_qemu_st64(c1, o->in2, get_mem_index(s));
>      tcg_gen_addi_i64(o->in2, o->in2, 8);
>      tcg_gen_qemu_st64(c2, o->in2, get_mem_index(s));
>      tcg_temp_free_i64(c1);
>      tcg_temp_free_i64(c2);
> +    tcg_temp_free_i64(todpr);
>      /* ??? We don't implement clock states.  */
>      gen_op_movi_cc(s, 0);
>      return NO_EXIT;
> 

IANATE (I am not a TCG expert), but as far as I can see, this seems to
be correct.

Reviewed-by: Thomas Huth <thuth@redhat.com>

  reply	other threads:[~2017-12-06 15:24 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-04 12:55 [Qemu-devel] [PATCH v1 for-2.12 0/5] s390x/tcg: CCW hotplug support David Hildenbrand
2017-12-04 12:55 ` [Qemu-devel] [PATCH v1 for-2.12 1/5] s390x/kvm: factor out build_channel_report_mcic() into cpu.h David Hildenbrand
2017-12-04 17:03   ` Cornelia Huck
2017-12-04 17:16     ` David Hildenbrand
2017-12-05 10:20       ` Cornelia Huck
2017-12-05 11:29         ` David Hildenbrand
2017-12-04 12:55 ` [Qemu-devel] [PATCH v1 for-2.12 2/5] s390x/tcg: fix and cleanup mcck injection David Hildenbrand
2017-12-04 17:20   ` Cornelia Huck
2017-12-04 17:27     ` David Hildenbrand
2017-12-05 10:14       ` Cornelia Huck
2017-12-05 15:53   ` Thomas Huth
2017-12-05 16:22     ` David Hildenbrand
2017-12-04 12:55 ` [Qemu-devel] [PATCH v1 for-2.12 3/5] s390x/tcg: implement SET CLOCK PROGRAMMABLE FIELD David Hildenbrand
2017-12-05 11:05   ` Cornelia Huck
2017-12-06 15:10   ` Thomas Huth
2017-12-06 15:15     ` David Hildenbrand
2017-12-04 12:55 ` [Qemu-devel] [PATCH v1 for-2.12 4/5] s390x/tcg: indicate value of TODPR in STCKE David Hildenbrand
2017-12-06 15:24   ` Thomas Huth [this message]
2017-12-04 12:55 ` [Qemu-devel] [PATCH v1 for-2.12 5/5] s390x/tcg: wire up STORE CHANNEL REPORT WORD David Hildenbrand
2017-12-04 17:22   ` Cornelia Huck
2017-12-04 17:34     ` David Hildenbrand
2017-12-04 17:53       ` Cornelia Huck
2017-12-04 17:56         ` David Hildenbrand
2017-12-04 17:58           ` Cornelia Huck
2017-12-04 18:37             ` David Hildenbrand
2017-12-05 10:04               ` Cornelia Huck
2017-12-06 15:40   ` Thomas Huth
2017-12-04 13:10 ` [Qemu-devel] [PATCH v1 for-2.12 0/5] s390x/tcg: CCW hotplug support no-reply
2017-12-04 13:21   ` David Hildenbrand
2017-12-04 13:35 ` no-reply
2017-12-04 16:56 ` Cornelia Huck
2017-12-04 17:00   ` David Hildenbrand

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