From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41522) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eMbYq-00024o-9U for qemu-devel@nongnu.org; Wed, 06 Dec 2017 10:24:37 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eMbYn-0008Fo-2y for qemu-devel@nongnu.org; Wed, 06 Dec 2017 10:24:36 -0500 References: <20171204125505.29203-1-david@redhat.com> <20171204125505.29203-5-david@redhat.com> From: Thomas Huth Message-ID: Date: Wed, 6 Dec 2017 16:24:25 +0100 MIME-Version: 1.0 In-Reply-To: <20171204125505.29203-5-david@redhat.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v1 for-2.12 4/5] s390x/tcg: indicate value of TODPR in STCKE List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: David Hildenbrand , qemu-s390x@nongnu.org, qemu-devel@nongnu.org Cc: Cornelia Huck , Richard Henderson On 04.12.2017 13:55, David Hildenbrand wrote: > We were not yet using the value of the TOD Programmable Register. > > Signed-off-by: David Hildenbrand > --- > target/s390x/translate.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/target/s390x/translate.c b/target/s390x/translate.c > index 48b031894a..8da8610839 100644 > --- a/target/s390x/translate.c > +++ b/target/s390x/translate.c > @@ -3897,7 +3897,10 @@ static ExitStatus op_stcke(DisasContext *s, DisasOps *o) > { > TCGv_i64 c1 = tcg_temp_new_i64(); > TCGv_i64 c2 = tcg_temp_new_i64(); > + TCGv_i64 todpr = tcg_temp_new_i64(); > gen_helper_stck(c1, cpu_env); > + /* 16 bit value store in an uint32_t (only valid bits set) */ > + tcg_gen_ld32u_i64(todpr, cpu_env, offsetof(CPUS390XState, todpr)); > /* Shift the 64-bit value into its place as a zero-extended > 104-bit value. Note that "bit positions 64-103 are always > non-zero so that they compare differently to STCK"; we set > @@ -3905,11 +3908,13 @@ static ExitStatus op_stcke(DisasContext *s, DisasOps *o) > tcg_gen_shli_i64(c2, c1, 56); > tcg_gen_shri_i64(c1, c1, 8); > tcg_gen_ori_i64(c2, c2, 0x10000); > + tcg_gen_or_i64(c2, c2, todpr); > tcg_gen_qemu_st64(c1, o->in2, get_mem_index(s)); > tcg_gen_addi_i64(o->in2, o->in2, 8); > tcg_gen_qemu_st64(c2, o->in2, get_mem_index(s)); > tcg_temp_free_i64(c1); > tcg_temp_free_i64(c2); > + tcg_temp_free_i64(todpr); > /* ??? We don't implement clock states. */ > gen_op_movi_cc(s, 0); > return NO_EXIT; > IANATE (I am not a TCG expert), but as far as I can see, this seems to be correct. Reviewed-by: Thomas Huth