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From: =?UTF-8?Q?C=c3=a9dric_Le_Goater?= <clg@kaod.org>
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Date: Tue, 27 Sep 2016 09:16:03 +0200
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Subject: Re: [Qemu-devel] [PATCH v3 07/10] ppc/pnv: add XSCOM infrastructure
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To: Benjamin Herrenschmidt <benh@kernel.crashing.org>, David Gibson <david@gibson.dropbear.id.au>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org

On 09/27/2016 08:10 AM, Benjamin Herrenschmidt wrote:
> On Tue, 2016-09-27 at 07:54 +0200, C=C3=A9dric Le Goater wrote:
>>
>>> but I guess if you have the decoding of those "core" registers=20
>>> here as well, then that doesn't make so much sense.
>=20
> Those core registers may well change with P9, we havne't looked closely
> yet...

Neither have I ... qemu/pnv reaches the kernel but this is really a=20
"Frankenstein P9". The interrupt controller is missing.=20

C.=20

>> yes and there is also the handling of the XSCOM failures.
>>
>> I can add some prologue handler to cover those "core" registers
>> but adding a MemoryRegion, ops, init and mapping would be a lot=20
>> of churn just to return 0.
>>
>> Thanks,