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Fri, 12 Dec 2025 08:35:42 -0800 (PST) Received: from [10.229.62.227] ([187.217.227.247]) by smtp.gmail.com with ESMTPSA id 5614622812f47-45598b992d6sm2829886b6e.7.2025.12.12.08.35.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 12 Dec 2025 08:35:41 -0800 (PST) Message-ID: Date: Fri, 12 Dec 2025 10:35:38 -0600 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH-for-11.0 v3 14/22] target/mips: Drop almask argument of HELPER_LD_ATOMIC() macro To: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo References: <20251126202200.23100-1-philmd@linaro.org> <20251126202200.23100-15-philmd@linaro.org> From: Richard Henderson Content-Language: en-US In-Reply-To: <20251126202200.23100-15-philmd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::22f; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x22f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 11/26/25 14:21, Philippe Mathieu-Daudé wrote: > HELPER_LD_ATOMIC() now has a MemOpIdx, from which we > can extract the MemOp size. Use it to check the address > alignment. > > Signed-off-by: Philippe Mathieu-Daudé > --- > target/mips/tcg/ldst_helper.c | 10 ++++++---- > 1 file changed, 6 insertions(+), 4 deletions(-) True, but adding MO_ALIGN to the MemOpIdx (and thus to the MemOp) might be more useful, allowing you to remove this explicit check. r~ > > diff --git a/target/mips/tcg/ldst_helper.c b/target/mips/tcg/ldst_helper.c > index 013cd825dac..bef384575c2 100644 > --- a/target/mips/tcg/ldst_helper.c > +++ b/target/mips/tcg/ldst_helper.c > @@ -29,12 +29,14 @@ > > #ifndef CONFIG_USER_ONLY > > -#define HELPER_LD_ATOMIC(name, almask, cpu_load) \ > +#define HELPER_LD_ATOMIC(name, cpu_load) \ > target_ulong helper_##name(CPUMIPSState *env, target_ulong arg, int memop_idx)\ > { \ > MemOpIdx oi = memop_idx; \ > unsigned mem_idx = get_mmuidx(oi); \ > - if (arg & almask) { \ > + MemOp op = get_memop(oi); \ > + unsigned size = memop_size(op); \ > + if (arg & (size - 1)) { \ > if (!(env->hflags & MIPS_HFLAG_DM)) { \ > env->CP0_BadVAddr = arg; \ > } \ > @@ -52,14 +54,14 @@ static target_ulong loads4(CPUMIPSState *env, target_ulong arg, > { > return (target_long)(int32_t)cpu_ldl_mmuidx_ra(env, arg, mem_idx, ra); > } > -HELPER_LD_ATOMIC(ll, 0x3, loads4) > +HELPER_LD_ATOMIC(ll, loads4) > #ifdef TARGET_MIPS64 > static target_ulong loadu8(CPUMIPSState *env, target_ulong arg, > unsigned mem_idx, uintptr_t ra) > { > return (target_ulong)cpu_ldq_mmuidx_ra(env, arg, mem_idx, ra); > } > -HELPER_LD_ATOMIC(lld, 0x7, loadu8) > +HELPER_LD_ATOMIC(lld, loadu8) > #endif > #undef HELPER_LD_ATOMIC >