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Wed, 10 Sep 2025 14:21:51 +0000 (GMT) Message-ID: Subject: Re: [PATCH v3 8/9] hw/ppc: Add a test machine for the IBM PPE42 CPU From: Miles Glenn To: =?ISO-8859-1?Q?C=E9dric?= Le Goater , qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, npiggin@gmail.com, harshpb@linux.ibm.com, thuth@redhat.com, rathc@linux.ibm.com, richard.henderson@linaro.org Date: Wed, 10 Sep 2025 09:21:51 -0500 In-Reply-To: References: <20250908200028.115789-1-milesg@linux.ibm.com> <20250908200028.115789-9-milesg@linux.ibm.com> Organization: IBM Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5 (3.28.5-27.el8_10) Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: SVRmV47O-NFl_NWZ1zyZWUoo9UC2UYfK X-Proofpoint-GUID: KT9Mxe_5Mp9BUUvWhO5b0hojunITAK_D X-Authority-Analysis: v=2.4 cv=EYDIQOmC c=1 sm=1 tr=0 ts=68c18984 cx=c_pps a=5BHTudwdYE3Te8bg5FgnPg==:117 a=5BHTudwdYE3Te8bg5FgnPg==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=VnNF1IyMAAAA:8 a=69wJf7TsAAAA:8 a=up-X0YpDAAAA:8 a=20KFwNOVAAAA:8 a=14Q3UDedklbQJ-9NY7oA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=Fg1AiH1G6rFz08G2ETeA:22 a=86FmjZgct7XXK6GGpxvI:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTA2MDAyMCBTYWx0ZWRfX4SssA8GF32Lf IlJBEhQvkiiGh92q+m/n62jGNW5ZqVdKET8CreBQM1IbrQNF5wye6+sAE5ZQIYtTGASV8UZspug OKWEUgeL4AfYXWJEXDDJlOIaskmfzUa27te3GNegpiJMYwFRBxcP8Jmp36pruvy0ClXwCKEGCBf r1ICNFVjQzfBOVuD5s8/HaBLRyI1wsjvX+Fa3cPWqlamHymjQhxNiZ6b5Ey4N+RszPHlSY8ITtt Kr+eK9lRVSM91PvELyqO/+sOmRGtzyXxURPJqBjbRPBuhJfeTqLkMVKugt8UQabRqb7LDWOm2PI gb0EDrb/2t45EzcCS10Dg6+MEwPSseofzMGmITP3n6Nsq3zqwINQnIwZwU8emTECmVhtgA3BL2Y y6mMEY5o X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-10_02,2025-09-10_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 suspectscore=0 spamscore=0 impostorscore=0 priorityscore=1501 phishscore=0 clxscore=1015 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2509060020 Received-SPF: pass client-ip=148.163.156.1; envelope-from=milesg@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: milesg@linux.ibm.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Wed, 2025-09-10 at 09:10 +0200, Cédric Le Goater wrote: > On 9/8/25 22:00, Glenn Miles wrote: > > Adds a test machine for the IBM PPE42 processor, including a > > DEC, FIT, WDT and 512 KiB of ram. > > > > The purpose of this machine is only to provide a generic platform > > for testing instructions of the recently added PPE42 processor > > model which is used extensively in the IBM Power9, Power10 and > > future Power server processors. > > > > Signed-off-by: Glenn Miles > > --- > > > > Changes from v2: > > - Moved decrementer changes to distinct commit > > - Introduced a specific MachineState for the ppe42 Machine > > - Use qdev_realize to create the machine > > - Use valid_cpu_types to determine validity of CPU > > - Changed machine ram limit from 2GB to 512KB > > > > MAINTAINERS | 6 +++ > > hw/ppc/Kconfig | 9 ++++ > > hw/ppc/meson.build | 2 + > > hw/ppc/ppe42_machine.c | 102 +++++++++++++++++++++++++++++++++++++++++ > > 4 files changed, 119 insertions(+) > > create mode 100644 hw/ppc/ppe42_machine.c > > > > diff --git a/MAINTAINERS b/MAINTAINERS > > index a07086ed76..52fa303e0a 100644 > > --- a/MAINTAINERS > > +++ b/MAINTAINERS > > @@ -1531,6 +1531,12 @@ F: include/hw/pci-host/grackle.h > > F: pc-bios/qemu_vga.ndrv > > F: tests/functional/test_ppc_mac.py > > > > +PPE42 > > +M: Glenn Miles > > +L: qemu-ppc@nongnu.org > > +S: Odd Fixes > > +F: hw/ppc/ppe42_machine.c > > + > > PReP > > M: Hervé Poussineau > > L: qemu-ppc@nongnu.org > > diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig > > index ced6bbc740..3fdea5919c 100644 > > --- a/hw/ppc/Kconfig > > +++ b/hw/ppc/Kconfig > > @@ -44,6 +44,15 @@ config POWERNV > > select SSI_M25P80 > > select PNV_SPI > > > > +config PPC405 > > + bool > > + default y > > + depends on PPC > > + select M48T59 > > + select PFLASH_CFI02 > > + select PPC4XX > > + select SERIAL > > Does the machine need all the above support ? No, it only needs PPC4XX. I'll remove the others. > > > + > > config PPC440 > > bool > > default y > > diff --git a/hw/ppc/meson.build b/hw/ppc/meson.build > > index 9893f8adeb..170b90ae7d 100644 > > --- a/hw/ppc/meson.build > > +++ b/hw/ppc/meson.build > > @@ -57,6 +57,8 @@ ppc_ss.add(when: 'CONFIG_POWERNV', if_true: files( > > 'pnv_n1_chiplet.c', > > )) > > # PowerPC 4xx boards > > +ppc_ss.add(when: 'CONFIG_PPC405', if_true: files( > > + 'ppe42_machine.c')) > > ppc_ss.add(when: 'CONFIG_PPC440', if_true: files( > > 'ppc440_bamboo.c', > > 'ppc440_uc.c')) > > diff --git a/hw/ppc/ppe42_machine.c b/hw/ppc/ppe42_machine.c > > new file mode 100644 > > index 0000000000..2cfce2503f > > --- /dev/null > > +++ b/hw/ppc/ppe42_machine.c > > @@ -0,0 +1,102 @@ > > +/* > > + * Test Machine for the IBM PPE42 processor > > + * > > + * Copyright (c) 2025, IBM Corporation. > > + * > > + * SPDX-License-Identifier: GPL-2.0-or-later > > + */ > > + > > +#include "qemu/osdep.h" > > +#include "qemu/units.h" > > +#include "qemu/error-report.h" > > +#include "system/address-spaces.h" > > +#include "hw/boards.h" > > +#include "hw/ppc/ppc.h" > > +#include "system/system.h" > > +#include "system/reset.h" > > +#include "system/kvm.h" > > +#include "qapi/error.h" > > + > > +#define TYPE_PPE42_MACHINE MACHINE_TYPE_NAME("ppe42_machine") > > +typedef MachineClass Ppe42MachineClass; > > +typedef struct Ppe42MachineState Ppe42MachineState; > > +DECLARE_OBJ_CHECKERS(Ppe42MachineState, Ppe42MachineClass, > > + PPE42_MACHINE, TYPE_PPE42_MACHINE) > > + > > +struct Ppe42MachineState { > > + MachineState parent_obj; > > + > > + PowerPCCPU cpu; > > +}; > > + > > +static void main_cpu_reset(void *opaque) > > +{ > > + PowerPCCPU *cpu = opaque; > > + > > + cpu_reset(CPU(cpu)); > > +} > > + > > +static void ppe42_machine_init(MachineState *machine) > > +{ > > + Ppe42MachineState *pms = PPE42_MACHINE(machine); > > + PowerPCCPU *cpu = &pms->cpu; > > + > > + if (kvm_enabled()) { > > + error_report("machine %s does not support the KVM accelerator", > > + MACHINE_GET_CLASS(machine)->name); > > + exit(EXIT_FAILURE); > > + } > > + > > + /* init CPU */ > > + object_initialize_child(OBJECT(pms), "cpu", cpu, machine->cpu_type); > > + if (!qdev_realize(DEVICE(cpu), NULL, &error_fatal)) { > > + return; > > + } > > + > > + qemu_register_reset(main_cpu_reset, cpu); > > + > > + /* This sets the decrementer timebase */ > > + ppc_booke_timers_init(cpu, 37500000, PPC_TIMER_PPE); > > + > > + /* RAM */ > > + if (machine->ram_size > 512 * KiB) { > > + error_report("RAM size more than 512 KiB is not supported"); > > + exit(1); > > + } > > In case of resend, the RAM size could be tested sooner (after kvm_enabled()). > Sure, I'll move it up. > > + memory_region_add_subregion(get_system_memory(), 0xfff80000, machine->ram); > > +} > > + > > + > > +static void ppe42_machine_class_init(ObjectClass *oc, const void *data) > > +{ > > + MachineClass *mc = MACHINE_CLASS(oc); > > + static const char * const valid_cpu_types[] = { > > + POWERPC_CPU_TYPE_NAME("PPE42"), > > + POWERPC_CPU_TYPE_NAME("PPE42X"), > > + POWERPC_CPU_TYPE_NAME("PPE42XM"), > > + NULL, > > + }; > > + > > + mc->desc = "PPE42 Test Machine"; > > + mc->init = ppe42_machine_init; > > + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("PPE42XM"); > > + mc->valid_cpu_types = valid_cpu_types; > > + mc->default_ram_id = "ram"; > > + mc->default_ram_size = 512 * KiB; > > +} > > + > > +static const TypeInfo ppe42_machine_info = { > > + .name = TYPE_PPE42_MACHINE, > > + .parent = TYPE_MACHINE, > > + .instance_size = sizeof(Ppe42MachineState), > > + .class_init = ppe42_machine_class_init, > > + .class_size = sizeof(Ppe42MachineClass), > > +}; > > + > > +static void ppe42_machine_register_types(void) > > +{ > > + type_register_static(&ppe42_machine_info); > > +} > > + > > +type_init(ppe42_machine_register_types); > > + > > Reviewed-by: Cédric Le Goater > > Thanks, > > C. > Thank you for your help! Glenn