From: Richard Henderson <rth@twiddle.net>
To: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
"Alex Bennée" <alex.bennee@linaro.org>
Subject: Re: [Qemu-devel] [RFC 0/3] split core mmu_idx from ARMMMUIdx values
Date: Wed, 26 Apr 2017 12:07:05 +0200 [thread overview]
Message-ID: <b196d1fa-3db5-6d9b-8eff-dda153f23a01@twiddle.net> (raw)
In-Reply-To: <1493051615-30715-1-git-send-email-peter.maydell@linaro.org>
On 04/24/2017 06:33 PM, Peter Maydell wrote:
> Overall questions:
> * does this look like it's workable enough to justify taking
> it rather than the simple-but-worse-perf-on-some-archs
> option 1 ?
I think it's workable.
> * this does risk breaking A profile in corner cases, because
> C unfortunately doesn't typecheck int vs enum so if I forgot
> a call to an index conversion function somewhere things will
> break. are we happy the risk isn't too huge?
If you like, we could add a tcg_debug assert somewhere that verifies that the
given index is < NB_MMU_MODES...
r~
next prev parent reply other threads:[~2017-04-26 10:07 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-24 16:33 [Qemu-devel] [RFC 0/3] split core mmu_idx from ARMMMUIdx values Peter Maydell
2017-04-24 16:33 ` [Qemu-devel] [RFC 1/3] arm: Use the mmu_idx we're passed in arm_cpu_do_unaligned_access() Peter Maydell
2017-04-26 9:57 ` Richard Henderson
2017-04-24 16:33 ` [Qemu-devel] [RFC 2/3] arm: Add support for M profile CPUs having different MMU index semantics Peter Maydell
2017-04-24 16:33 ` [Qemu-devel] [RFC 3/3] arm: Use different ARMMMUIdx values for M profile Peter Maydell
2017-04-24 18:15 ` [Qemu-devel] [Qemu-arm] [RFC 0/3] split core mmu_idx from ARMMMUIdx values Peter Maydell
2017-04-26 10:07 ` Richard Henderson [this message]
2017-04-26 10:17 ` [Qemu-devel] " Peter Maydell
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