From: Richard Henderson <rth@twiddle.net>
To: bharata@linux.vnet.ibm.com
Cc: qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
nikunj@linux.vnet.ibm.com, david@gibson.dropbear.id.au
Subject: Re: [Qemu-devel] [PATCH] target-ppc: Add quad precision muladd instructions
Date: Fri, 17 Feb 2017 07:53:20 +1100 [thread overview]
Message-ID: <b2492a5c-51c5-834c-4d99-c055d78d1f67@twiddle.net> (raw)
In-Reply-To: <20170216024126.GA17196@in.ibm.com>
On 02/16/2017 01:41 PM, Bharata B Rao wrote:
> For some reason float128_mul implements
> multipliction via multiplication and addition (mul128To256 & add128). There
> is no equivalent to this in float64_muladd.
Yes, I don't understand that myself. It really appears to be a bug.
r~
next prev parent reply other threads:[~2017-02-16 20:53 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-15 6:37 [Qemu-devel] [PATCH] target-ppc: Add quad precision muladd instructions Bharata B Rao
2017-02-15 22:13 ` Richard Henderson
2017-02-16 2:41 ` Bharata B Rao
2017-02-16 20:53 ` Richard Henderson [this message]
-- strict thread matches above, loose matches on Subject: below --
2020-09-22 8:04 David Hildenbrand
2020-09-22 9:22 ` Bharata B Rao
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