Re: [PATCH 0/5] gicv3: Use right number of prio bits for the CPU

[Richard Henderson <richard.henderson@linaro.org>]

On 5/6/22 11:21, Peter Maydell wrote:
> This patchset fills in an odd inconsistency in our GICv3 emulation
> that I noticed while I was doing the GICv4 work. At the moment we
> allow the CPU to specify the number of bits of virtual priority
> (via the ARMCPU::gic_vpribits field), but we always use 8 bits of
> physical priority, even though to my knowledge no real Arm CPU
> hardware has that many.
> 
> This series makes the GICv3 emulation use a runtime-configurable
> number of physical priority bits, and sets it to match the number
> used by the various CPUs we implement (which is 5 for all the
> Cortex-Axx CPUs we emulate). Because changing the number of
> priority bits is a migration compatibility break, we use a compat
> property to keep the number of priority bits at 8 for older
> versions of the virt board.
> 
> There is one TODO left in this series, which is that I don't know
> the right value to use for the A64FX, so I've guessed that it
> is 5, like all the Arm implementations.
> 
> Patch 1 is an independent bugfix; patch 5 is cleanup.
> 
> thanks
> -- PMM
> 
> Peter Maydell (5):
>    hw/intc/arm_gicv3: report correct PRIbits field in ICV_CTLR_EL1
>    hw/intc/arm_gicv3_kvm.c: Stop using GIC_MIN_BPR constant
>    hw/intc/arm_gicv3: Support configurable number of physical priority
>      bits
>    hw/intc/arm_gicv3: Use correct number of priority bits for the CPU
>    hw/intc/arm_gicv3: Provide ich_num_aprs()
> 

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~