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From: "Igor Kovalenko" <igor.v.kovalenko@gmail.com>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH] handle multibyte NOPs
Date: Mon, 21 Aug 2006 02:28:13 +0400	[thread overview]
Message-ID: <b2fa41d60608201528y24c0437boa0b7084a68b0cf84@mail.gmail.com> (raw)
In-Reply-To: <Pine.LNX.4.64.0608210212150.11941@home.oyster.ru>


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On 8/21/06, malc <malc@pulsesoft.com> wrote:
>
> On Mon, 21 Aug 2006, Igor Kovalenko wrote:
>
> > On 8/19/06, Paul Brook <paul@codesourcery.com> wrote:
> >>
> >> On Saturday 19 August 2006 00:40, Igor Kovalenko wrote:
> >> > Hi!
> >> >
> >> > This patch adds handling of multi-byte NOPs, recent gcc/gas uses them
> >> for
> >> > x86 code padding.
> >> > Patch checked with current opensuse-factory x86 guest installation
> which
> >> is
> >> > built with new gcc/gas tools.
> >>
> >> According to my amd64 documentation all of the opcodes 0f 19 through 0f
> 1f
> >> should be implemented as a NOP. Also, I suspect the "invalid" prefetch
> ops
> >> (0f 18) should also be implemented as nops.
> >> The same implementation should be useable to all these opcodes.
> >>
> >>
> > Updated patch, extracted noop modrm processing into separate function
> and
> > used it for 0f 18 case as well. I also removed reg sense from noop
> > processing.
>
> Case labels in your `switch (mod)' statement are incorrect. I guess you
> wanted 0x to behave like 0b, while it works for 0 and 1, for everything
> else it's way of.
>

Right. Here is the real one with correct case labels.

-- 
Kind Regards,
Igor V. Kovalenko

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Index: target-i386/translate.c
===================================================================
RCS file: /cvsroot/qemu/qemu/target-i386/translate.c,v
retrieving revision 1.59
diff -u -r1.59 translate.c
--- target-i386/translate.c	10 Jul 2006 19:53:04 -0000	1.59
+++ target-i386/translate.c	20 Aug 2006 22:27:32 -0000
@@ -1615,6 +1615,43 @@
     *offset_ptr = disp;
 }
 
+static void gen_nop_modrm(DisasContext *s, int modrm)
+{
+    int rm, mod;
+    rm  = modrm & 7;
+    mod = (modrm >> 6) & 3;
+
+    if (rm == 0x04)
+    {
+        /* SIB byte follows */
+        s->pc += 1;
+    }
+
+    switch (mod)
+    {
+        case 0:
+            if (rm == 0x05)
+            {
+                /* 32bit data follows */
+                s->pc += 4;
+            }
+            /* else register is specified */
+            break;
+        case 1:
+            /* 8bit data follows */
+            s->pc += 1;
+            break;
+        case 2:
+            /* 32bit data follows */
+            s->pc += 4;
+            break;
+        case 3:
+        default:
+            /* register is specified */
+            break;
+    }
+}
+
 /* used for LEA and MOV AX, mem */
 static void gen_add_A0_ds_seg(DisasContext *s)
 {
@@ -5792,9 +5829,15 @@
             /* nothing more to do */
             break;
         default:
-            goto illegal_op;
+            gen_nop_modrm(s, modrm);
+            break;
         }
         break;
+    case 0x119 ... 0x11f:
+        /* multi-byte noop */
+        modrm = ldub_code(s->pc++);
+        gen_nop_modrm(s, modrm);
+        break;
     case 0x120: /* mov reg, crN */
     case 0x122: /* mov crN, reg */
         if (s->cpl != 0) {

  reply	other threads:[~2006-08-20 22:28 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2006-08-18 23:40 [Qemu-devel] [PATCH] handle multibyte NOPs Igor Kovalenko
2006-08-19  0:28 ` Paul Brook
2006-08-20 21:51   ` Igor Kovalenko
2006-08-20 22:15     ` malc
2006-08-20 22:28       ` Igor Kovalenko [this message]
2006-08-20 22:39         ` malc
2006-08-20 22:47           ` Igor Kovalenko
2006-08-20 23:18             ` malc
2006-08-30 19:27               ` Igor Kovalenko

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