From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Ly9yB-0007in-D3 for qemu-devel@nongnu.org; Sun, 26 Apr 2009 15:24:55 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Ly9y6-0007ib-Tl for qemu-devel@nongnu.org; Sun, 26 Apr 2009 15:24:54 -0400 Received: from [199.232.76.173] (port=57264 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Ly9y6-0007iY-Oa for qemu-devel@nongnu.org; Sun, 26 Apr 2009 15:24:50 -0400 Received: from mail-bw0-f175.google.com ([209.85.218.175]:57503) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1Ly9y6-0007nI-8w for qemu-devel@nongnu.org; Sun, 26 Apr 2009 15:24:50 -0400 Received: by bwz23 with SMTP id 23so1743835bwz.34 for ; Sun, 26 Apr 2009 12:24:47 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: References: Date: Sun, 26 Apr 2009 23:24:46 +0400 Message-ID: Subject: Re: [Qemu-devel] [PATCH] sparc64 support TSB related MMU registers From: Igor Kovalenko Content-Type: multipart/mixed; boundary=001636c5abdbc686b904687a2ed7 List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Blue Swirl Cc: qemu-devel@nongnu.org --001636c5abdbc686b904687a2ed7 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable On Fri, Apr 24, 2009 at 9:42 PM, Blue Swirl wrote: > On 4/24/09, Igor Kovalenko wrote: >> Hi! >> >> =A0This change allows reading ultrasparc I/D MMU TSB tag target register >> =A0and TSB pointer register (8k and 64k). >> =A0Linux kernel uses TSB for memory management, and with this change it >> =A0now can use early allocation routines. >> >> =A0I'm testing with linux-2.6.29.1 minimalistic sparc64 uniprocessor >> =A0build, now kernel is able to start build device tree. >> =A0Without the change kernel was not able to handle D-MMU miss while >> =A0creating first device tree node. >> =A0Currently it stops shortly after building device tree, trying to find >> =A0out path to console. > > Nice, though I didn't notice any visible improvement in my tests. Here is the missing part in qemu-sparc64-mmu-pagesize.patch This fixes TLB match code to respect page size, otherwise 4M page mappings may be not found. Also this corrects a typo in get_physical_address_code which uses a register from DMMU instead of IMMU. Please apply. get_physical_address_data/code probably needs some code reuse refactoring. >> =A0(PS with openbios instance-to-path method fails in client interface >> =A0call, in the same way >> =A0it fails without loading kernel when I try invoking get-instance-path >> =A0on stdin handle from command prompt. >> =A0there fmove invokes memmove() with size argument looking like some >> =A0pointer which leads to unhandled D-MMU fault) > > Similar very obscure problem was fixed with PPC (r481), the bug was > with the PCI nodes. Here (r484) on sparc64 it hangs in the same place. --=20 Kind regards, Igor V. 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