From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Simon Burge <simonb@NetBSD.org>, qemu-devel@nongnu.org
Subject: Re: [PATCH] MIPS - fix cycle counter timing calculations
Date: Mon, 13 Dec 2021 11:10:57 +0100 [thread overview]
Message-ID: <b32b56b9-acda-66ae-6b81-e45cac403bd8@amsat.org> (raw)
In-Reply-To: <20211116072606.BE9C8A1856@thoreau.thistledown.com.au>
On 11/16/21 08:26, Simon Burge wrote:
> The cp0_count_ns value is calculated from the CP0_COUNT_RATE_DEFAULT
> constant in target/mips/cpu.c. The cycle counter resolution is defined
> per-CPU in target/mips/cpu-defs.c.inc; use this value for calculating
> cp0_count_ns. Fixings timing problems on guest OSs for the 20Kc CPU
> which has a CCRes of 1.
> ---
> target/mips/cpu.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
Good catch. Too bad you didn't Cc'ed the maintainers, this patch
would have been in the 6.2 release.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Queued to mips-next.
next prev parent reply other threads:[~2021-12-13 10:11 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-16 7:26 [PATCH] MIPS - fix cycle counter timing calculations Simon Burge
2021-12-13 10:10 ` Philippe Mathieu-Daudé [this message]
2021-12-13 10:23 ` Philippe Mathieu-Daudé
2021-12-13 13:51 ` [PATCH v2] " Simon Burge
2021-12-14 15:12 ` Philippe Mathieu-Daudé
2021-12-15 0:01 ` Simon Burge
2021-12-13 13:54 ` [PATCH] " Simon Burge
2021-12-13 14:36 ` Daniel P. Berrangé
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