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* [PATCH v3] accel/tcg: Fix typo causing tb->page_addr[1] to not be recorded
@ 2024-06-12 13:30 Anton Johansson via
  2024-06-12 15:43 ` Alex Bennée
  2024-06-16 18:32 ` Richard Henderson
  0 siblings, 2 replies; 3+ messages in thread
From: Anton Johansson via @ 2024-06-12 13:30 UTC (permalink / raw)
  To: qemu-devel
  Cc: richard.henderson, qemu-stable, Manos Pitsidianakis,
	Philippe Mathieu-Daudé

For TBs crossing page boundaries, the 2nd page will never be
recorded/removed, as the index of the 2nd page is computed from the
address of the 1st page. This is due to a typo, fix it.

Cc: qemu-stable@nongnu.org
Fixes: deba78709a ("accel/tcg: Always lock pages before translation")
Signed-off-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 accel/tcg/tb-maint.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
index 19ae6793f3..cc0f5afd47 100644
--- a/accel/tcg/tb-maint.c
+++ b/accel/tcg/tb-maint.c
@@ -713,7 +713,7 @@ static void tb_record(TranslationBlock *tb)
     tb_page_addr_t paddr0 = tb_page_addr0(tb);
     tb_page_addr_t paddr1 = tb_page_addr1(tb);
     tb_page_addr_t pindex0 = paddr0 >> TARGET_PAGE_BITS;
-    tb_page_addr_t pindex1 = paddr0 >> TARGET_PAGE_BITS;
+    tb_page_addr_t pindex1 = paddr1 >> TARGET_PAGE_BITS;
 
     assert(paddr0 != -1);
     if (unlikely(paddr1 != -1) && pindex0 != pindex1) {
@@ -745,7 +745,7 @@ static void tb_remove(TranslationBlock *tb)
     tb_page_addr_t paddr0 = tb_page_addr0(tb);
     tb_page_addr_t paddr1 = tb_page_addr1(tb);
     tb_page_addr_t pindex0 = paddr0 >> TARGET_PAGE_BITS;
-    tb_page_addr_t pindex1 = paddr0 >> TARGET_PAGE_BITS;
+    tb_page_addr_t pindex1 = paddr1 >> TARGET_PAGE_BITS;
 
     assert(paddr0 != -1);
     if (unlikely(paddr1 != -1) && pindex0 != pindex1) {
-- 
2.45.0



^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH v3] accel/tcg: Fix typo causing tb->page_addr[1] to not be recorded
  2024-06-12 13:30 [PATCH v3] accel/tcg: Fix typo causing tb->page_addr[1] to not be recorded Anton Johansson via
@ 2024-06-12 15:43 ` Alex Bennée
  2024-06-16 18:32 ` Richard Henderson
  1 sibling, 0 replies; 3+ messages in thread
From: Alex Bennée @ 2024-06-12 15:43 UTC (permalink / raw)
  To: Anton Johansson via
  Cc: Anton Johansson, richard.henderson, qemu-stable,
	Manos Pitsidianakis, Philippe Mathieu-Daudé

Anton Johansson via <qemu-devel@nongnu.org> writes:

> For TBs crossing page boundaries, the 2nd page will never be
> recorded/removed, as the index of the 2nd page is computed from the
> address of the 1st page. This is due to a typo, fix it.
>
> Cc: qemu-stable@nongnu.org
> Fixes: deba78709a ("accel/tcg: Always lock pages before translation")
> Signed-off-by: Anton Johansson <anjo@rev.ng>
> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

-- 
Alex Bennée
Virtualisation Tech Lead @ Linaro


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH v3] accel/tcg: Fix typo causing tb->page_addr[1] to not be recorded
  2024-06-12 13:30 [PATCH v3] accel/tcg: Fix typo causing tb->page_addr[1] to not be recorded Anton Johansson via
  2024-06-12 15:43 ` Alex Bennée
@ 2024-06-16 18:32 ` Richard Henderson
  1 sibling, 0 replies; 3+ messages in thread
From: Richard Henderson @ 2024-06-16 18:32 UTC (permalink / raw)
  To: Anton Johansson, qemu-devel
  Cc: qemu-stable, Manos Pitsidianakis, Philippe Mathieu-Daudé

On 6/12/24 06:30, Anton Johansson wrote:
> For TBs crossing page boundaries, the 2nd page will never be
> recorded/removed, as the index of the 2nd page is computed from the
> address of the 1st page. This is due to a typo, fix it.
> 
> Cc: qemu-stable@nongnu.org
> Fixes: deba78709a ("accel/tcg: Always lock pages before translation")
> Signed-off-by: Anton Johansson <anjo@rev.ng>
> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   accel/tcg/tb-maint.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)

Brown paper bag time.
Queued, thanks.


r~

> 
> diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
> index 19ae6793f3..cc0f5afd47 100644
> --- a/accel/tcg/tb-maint.c
> +++ b/accel/tcg/tb-maint.c
> @@ -713,7 +713,7 @@ static void tb_record(TranslationBlock *tb)
>       tb_page_addr_t paddr0 = tb_page_addr0(tb);
>       tb_page_addr_t paddr1 = tb_page_addr1(tb);
>       tb_page_addr_t pindex0 = paddr0 >> TARGET_PAGE_BITS;
> -    tb_page_addr_t pindex1 = paddr0 >> TARGET_PAGE_BITS;
> +    tb_page_addr_t pindex1 = paddr1 >> TARGET_PAGE_BITS;
>   
>       assert(paddr0 != -1);
>       if (unlikely(paddr1 != -1) && pindex0 != pindex1) {
> @@ -745,7 +745,7 @@ static void tb_remove(TranslationBlock *tb)
>       tb_page_addr_t paddr0 = tb_page_addr0(tb);
>       tb_page_addr_t paddr1 = tb_page_addr1(tb);
>       tb_page_addr_t pindex0 = paddr0 >> TARGET_PAGE_BITS;
> -    tb_page_addr_t pindex1 = paddr0 >> TARGET_PAGE_BITS;
> +    tb_page_addr_t pindex1 = paddr1 >> TARGET_PAGE_BITS;
>   
>       assert(paddr0 != -1);
>       if (unlikely(paddr1 != -1) && pindex0 != pindex1) {



^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2024-06-16 18:33 UTC | newest]

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2024-06-12 13:30 [PATCH v3] accel/tcg: Fix typo causing tb->page_addr[1] to not be recorded Anton Johansson via
2024-06-12 15:43 ` Alex Bennée
2024-06-16 18:32 ` Richard Henderson

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