From: Richard Henderson <richard.henderson@linaro.org>
To: Michael Clark <mjc@sifive.com>, qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
Sagar Karandikar <sagark@eecs.berkeley.edu>,
Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
Palmer Dabbelt <palmer@sifive.com>,
patches@groups.riscv.org
Subject: Re: [Qemu-devel] [PATCH v1 2/2] RISC-V: Fix incorrect disassembly for addiw
Date: Wed, 28 Mar 2018 12:40:23 +0800 [thread overview]
Message-ID: <b42aa903-82e2-21c6-f31a-cb71b691b037@linaro.org> (raw)
In-Reply-To: <1522180547-22956-3-git-send-email-mjc@sifive.com>
On 03/28/2018 03:55 AM, Michael Clark wrote:
> This fixes a bug in the disassembler constraints used
> to lift instructions into pseudo-instructions, whereby
> addiw instructions are always lifted to sext.w instead
> of just lifting addiw with a zero immediate.
>
> An associated fix has been made to the metadata used to
> machine generate the disseasembler:
>
> https://github.com/michaeljclark/riscv-meta/
> commit/4a6b2f3898430768acfe201405224d2ea31e1477
>
> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
> Cc: Palmer Dabbelt <palmer@sifive.com>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Michael Clark <mjc@sifive.com>
> ---
> disas/riscv.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2018-03-28 4:41 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-27 19:55 [Qemu-devel] [PATCH v1 0/2] RISC-V: Important fixes for QEMU 2.12 Michael Clark
2018-03-27 19:55 ` [Qemu-devel] [PATCH v1 1/2] RISC-V: Convert cpu definition to future model Michael Clark
2018-03-28 4:38 ` Richard Henderson
2018-03-27 19:55 ` [Qemu-devel] [PATCH v1 2/2] RISC-V: Fix incorrect disassembly for addiw Michael Clark
2018-03-27 22:15 ` Philippe Mathieu-Daudé
2018-03-28 4:40 ` Richard Henderson [this message]
2018-03-31 7:33 ` [Qemu-devel] [PATCH v1 0/2] RISC-V: Important fixes for QEMU 2.12 no-reply
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