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([2602:47:d48c:8101:c606:9489:98df:6a3b]) by smtp.gmail.com with ESMTPSA id y184-20020a6264c1000000b00576d4d69909sm2067625pfb.8.2022.12.16.16.40.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 16 Dec 2022 16:40:05 -0800 (PST) Message-ID: Date: Fri, 16 Dec 2022 16:40:03 -0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: [PATCH 08/10] target/riscv/cpu: Restrict sysemu-specific fields from CPUArchState Content-Language: en-US To: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= , qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , David Gibson , Xiaojuan Yang , Mark Cave-Ayland , Bin Meng , Artyom Tarasenko , =?UTF-8?Q?C=c3=a9dric_Le_Goater?= , Song Gao , Alistair Francis , qemu-ppc@nongnu.org, Laurent Vivier , Palmer Dabbelt , Taylor Simpson , Greg Kurz , qemu-riscv@nongnu.org, Max Filippov References: <20221216220539.7065-1-philmd@linaro.org> <20221216220539.7065-9-philmd@linaro.org> From: Richard Henderson In-Reply-To: <20221216220539.7065-9-philmd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 12/16/22 14:05, Philippe Mathieu-Daudé wrote: > The 'hwaddr' type is only available / meaningful on system emulation. > > Signed-off-by: Philippe Mathieu-Daudé > --- > target/riscv/cpu.h | 34 ++++++++++++++++++---------------- > 1 file changed, 18 insertions(+), 16 deletions(-) > > diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h > index fc1f72e5c3..bd4e16d946 100644 > --- a/target/riscv/cpu.h > +++ b/target/riscv/cpu.h > @@ -368,16 +368,6 @@ struct CPUArchState { > uint64_t menvcfg; > target_ulong senvcfg; > uint64_t henvcfg; > -#endif > - target_ulong cur_pmmask; > - target_ulong cur_pmbase; > - > - float_status fp_status; > - > - /* Fields from here on are preserved across CPU reset. */ > - QEMUTimer *stimer; /* Internal timer for S-mode interrupt */ > - QEMUTimer *vstimer; /* Internal timer for VS-mode interrupt */ > - bool vstime_irq; > > hwaddr kernel_addr; > hwaddr fdt_addr; > @@ -388,6 +378,16 @@ struct CPUArchState { > uint64_t kvm_timer_compare; > uint64_t kvm_timer_state; > uint64_t kvm_timer_frequency; > +#endif > + target_ulong cur_pmmask; > + target_ulong cur_pmbase; > + > + float_status fp_status; > + > + /* Fields from here on are preserved across CPU reset. */ > + QEMUTimer *stimer; /* Internal timer for S-mode interrupt */ > + QEMUTimer *vstimer; /* Internal timer for VS-mode interrupt */ > + bool vstime_irq; > }; Except for fp_status, all of the other fields that you move are sysemu specific. r~