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From: Paolo Bonzini <pbonzini@redhat.com>
To: Babu Moger <babu.moger@amd.com>
Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org
Subject: Re: [PATCH v3 0/7] target/i386: Add support for perfmon-v2, RAS bits and EPYC-Turin CPU model
Date: Mon, 28 Oct 2024 09:37:49 +0100	[thread overview]
Message-ID: <b4b7abae-669a-4a86-81d3-d1f677a82929@redhat.com> (raw)
In-Reply-To: <cover.1729807947.git.babu.moger@amd.com>

On 10/25/24 00:18, Babu Moger wrote:
> 
> This series adds the support for following features in qemu.
> 1. RAS feature bits (SUCCOR, McaOverflowRecov)
> 2. perfmon-v2
> 3. Update EPYC-Genoa to support perfmon-v2 and RAS bits
> 4. Support for bits related to SRSO (sbpb, ibpb-brtype, srso-user-kernel-no)
> 5. Added support for feature bits CPUID_Fn80000021_EAX/CPUID_Fn80000021_EBX
>     to address CPUID enforcement requirement in Turin platforms.
> 6. Add support for EPYC-Turin.

Queued, thanks.  I looked at 
https://gitlab.com/qemu-project/qemu/-/issues/2571 and I think it's 
caused by the ignore_msrs=1 parameter on the KVM kernel module.

However, can you look into adding new CPUID_SVM_* bits?

Thanks,

Paolo

> Link: https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/programmer-references/57238.zip
> Link: https://www.amd.com/content/dam/amd/en/documents/corporate/cr/speculative-return-stack-overflow-whitepaper.pdf
> ---
> v3: Added SBPB, IBPB_BRTYPE, SRSO_USER_KERNEL_NO, ERAPS and RAPSIZE bits
>      to EPYC-Turin.
> 
> v2: Fixed couple of typos.
>      Added Reviewed-by tag from Zhao.
>      Rebased on top of 6d00c6f98256 ("Merge tag 'for-upstream' of https://repo.or.cz/qemu/kevin into staging")
> 
> v2: https://lore.kernel.org/kvm/cover.1723068946.git.babu.moger@amd.com/
>    
> v1: https://lore.kernel.org/qemu-devel/cover.1718218999.git.babu.moger@amd.com/
> 
> Babu Moger (6):
>    target/i386: Fix minor typo in NO_NESTED_DATA_BP feature bit
>    target/i386: Add RAS feature bits on EPYC CPU models
>    target/i386: Enable perfmon-v2 and RAS feature bits on EPYC-Genoa
>    target/i386: Expose bits related to SRSO vulnerability
>    target/i386: Expose new feature bits in CPUID 8000_0021_EAX/EBX
>    target/i386: Add support for EPYC-Turin model
> 
> Sandipan Das (1):
>    target/i386: Add PerfMonV2 feature bit
> 
>   target/i386/cpu.c | 222 +++++++++++++++++++++++++++++++++++++++++++++-
>   target/i386/cpu.h |  27 +++++-
>   2 files changed, 242 insertions(+), 7 deletions(-)
> 



  parent reply	other threads:[~2024-10-28  8:39 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-24 22:18 [PATCH v3 0/7] target/i386: Add support for perfmon-v2, RAS bits and EPYC-Turin CPU model Babu Moger
2024-10-24 22:18 ` [PATCH v3 1/7] target/i386: Fix minor typo in NO_NESTED_DATA_BP feature bit Babu Moger
2024-10-28  3:41   ` Zhao Liu
2024-10-24 22:18 ` [PATCH v3 2/7] target/i386: Add RAS feature bits on EPYC CPU models Babu Moger
2024-10-28  6:59   ` Zhao Liu
2024-10-30 18:53     ` John Allen
2024-10-24 22:18 ` [PATCH v3 3/7] target/i386: Add PerfMonV2 feature bit Babu Moger
2024-10-24 22:18 ` [PATCH v3 4/7] target/i386: Enable perfmon-v2 and RAS feature bits on EPYC-Genoa Babu Moger
2024-10-24 22:18 ` [PATCH v3 5/7] target/i386: Expose bits related to SRSO vulnerability Babu Moger
2024-10-28  8:56   ` Zhao Liu
2024-10-28 14:28     ` Moger, Babu
2024-10-24 22:18 ` [PATCH v3 6/7] target/i386: Expose new feature bits in CPUID 8000_0021_EAX/EBX Babu Moger
2024-10-24 22:18 ` [PATCH v3 7/7] target/i386: Add support for EPYC-Turin model Babu Moger
2024-10-28  8:37 ` Paolo Bonzini [this message]
2024-10-28 14:23   ` [PATCH v3 0/7] target/i386: Add support for perfmon-v2, RAS bits and EPYC-Turin CPU model Moger, Babu
2024-10-28 14:25     ` Paolo Bonzini
2024-10-28 18:27       ` Moger, Babu
2024-10-28 18:46 ` Paolo Bonzini

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