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[83.57.174.129]) by smtp.gmail.com with ESMTPSA id r1sm15711961wrw.60.2019.10.23.04.19.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 23 Oct 2019 04:19:15 -0700 (PDT) Subject: Re: [PATCH v5 4/7] ppc/pnv: Add a PnvChip pointer to PnvCore To: =?UTF-8?Q?C=c3=a9dric_Le_Goater?= , David Gibson References: <20191022163812.330-1-clg@kaod.org> <20191022163812.330-5-clg@kaod.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: Date: Wed, 23 Oct 2019 13:19:14 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.1.1 MIME-Version: 1.0 In-Reply-To: <20191022163812.330-5-clg@kaod.org> Content-Language: en-US X-MC-Unique: QAc8rRGXM_2sSTxbWXizWQ-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 207.211.31.120 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Greg Kurz Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 10/22/19 6:38 PM, C=C3=A9dric Le Goater wrote: > We will use it to reset the interrupt presenter from the CPU reset > handler. >=20 > Signed-off-by: C=C3=A9dric Le Goater > Reviewed-by: Greg Kurz > --- > include/hw/ppc/pnv_core.h | 3 +++ > hw/ppc/pnv_core.c | 3 ++- > 2 files changed, 5 insertions(+), 1 deletion(-) >=20 > diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h > index bfbd2ec42aa6..55eee95104da 100644 > --- a/include/hw/ppc/pnv_core.h > +++ b/include/hw/ppc/pnv_core.h > @@ -31,6 +31,8 @@ > #define PNV_CORE_GET_CLASS(obj) \ > OBJECT_GET_CLASS(PnvCoreClass, (obj), TYPE_PNV_CORE) > =20 > +typedef struct PnvChip PnvChip; > + > typedef struct PnvCore { > /*< private >*/ > CPUCore parent_obj; > @@ -38,6 +40,7 @@ typedef struct PnvCore { > /*< public >*/ > PowerPCCPU **threads; > uint32_t pir; > + PnvChip *chip; > =20 > MemoryRegion xscom_regs; > } PnvCore; > diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c > index 9f981a4940e6..cc17bbfed829 100644 > --- a/hw/ppc/pnv_core.c > +++ b/hw/ppc/pnv_core.c > @@ -222,6 +222,7 @@ static void pnv_core_realize(DeviceState *dev, Error = **errp) > "required link 'chip' not found: "); > return; > } > + pc->chip =3D PNV_CHIP(chip); > =20 > pc->threads =3D g_new(PowerPCCPU *, cc->nr_threads); > for (i =3D 0; i < cc->nr_threads; i++) { > @@ -243,7 +244,7 @@ static void pnv_core_realize(DeviceState *dev, Error = **errp) > } > =20 > for (j =3D 0; j < cc->nr_threads; j++) { > - pnv_realize_vcpu(pc->threads[j], PNV_CHIP(chip), &local_err); > + pnv_realize_vcpu(pc->threads[j], pc->chip, &local_err); > if (local_err) { > goto err; > } >=20 Reviewed-by: Philippe Mathieu-Daud=C3=A9