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From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH 06/11] target/arm: Reset btype for direct branches and syscalls
Date: Mon, 28 Jan 2019 13:28:40 -0800	[thread overview]
Message-ID: <b4e20937-dbf0-1e26-8426-dcea14874833@linaro.org> (raw)
In-Reply-To: <CAFEAcA_cvfL2Sja4WawDAR++Ak85yKo7J=Xy4hzO_ChiFt7mZw@mail.gmail.com>

On 1/22/19 6:12 AM, Peter Maydell wrote:
> On Thu, 10 Jan 2019 at 12:17, Richard Henderson
> <richard.henderson@linaro.org> wrote:
>>
>> This is all of the non-exception cases of DISAS_NORETURN.
> 
> What about the gen_helper_exit_atomic() exit cases ?

In that case we are going to re-execute the same insn with a different
translation, so we do not want to change btype.

(Although I'm not sure how the guest could tell.  Given where we check for
btype mismatch, we would recognize the BTI exception before getting into the
ldst_ex path that generates the ATOMIC exception.  So any DataAbort exception
that the atomic insn itself might generate must also have BTYPE == 0.)

>> For the rest of the synchronous exceptions, the state of
>> SPSR_ELx.BTYPE is CONSTRAINED UNPREDICTABLE.  However, it
>> makes more sense to me to have syscalls reset BTYPE.
> 
> The advantage of picking the other choice (SPSR_ELx.BTYPE ==
> PSTATE.BTYPE) is that it means that the behaviour is identical
> for all exceptions (async or sync of any type) and we don't
> do the work of clearing the BTYPE field (which will happen
> potentially in "normal" guest code if we're not in a guarded page,
> I think).

Well, BTYPE is in the TB flags, so we know it's already zero in that case, so
there's no extra work.  But you're probably right about not making syscall
special.  I've removed that.


r~

  reply	other threads:[~2019-01-28 21:28 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-10 12:17 [Qemu-devel] [PATCH 00/11] target/arm: Implement ARMv8.5-BTI Richard Henderson
2019-01-10 12:17 ` [Qemu-devel] [PATCH 01/11] target/arm: Introduce isar_feature_aa64_bti Richard Henderson
2019-01-22 12:01   ` Peter Maydell
2019-01-10 12:17 ` [Qemu-devel] [PATCH 02/11] target/arm: Add PSTATE.BTYPE Richard Henderson
2019-01-22 12:08   ` Peter Maydell
2019-01-10 12:17 ` [Qemu-devel] [PATCH 03/11] target/arm: Add BT and BTYPE to tb->flags Richard Henderson
2019-01-22 12:57   ` Peter Maydell
2019-01-10 12:17 ` [Qemu-devel] [PATCH 04/11] target/arm: Record the GP bit for a page in MemTxAttrs Richard Henderson
2019-01-22 13:26   ` Peter Maydell
2019-01-28 21:08     ` Richard Henderson
2019-01-29  9:55       ` Peter Maydell
2019-01-29 14:38         ` Richard Henderson
2019-01-10 12:17 ` [Qemu-devel] [PATCH 05/11] target/arm: Default handling of BTYPE during translation Richard Henderson
2019-01-22 13:50   ` Peter Maydell
2019-01-10 12:17 ` [Qemu-devel] [PATCH 06/11] target/arm: Reset btype for direct branches and syscalls Richard Henderson
2019-01-22 14:12   ` Peter Maydell
2019-01-28 21:28     ` Richard Henderson [this message]
2019-01-29  9:57       ` Peter Maydell
2019-01-29 14:05         ` Richard Henderson
2019-01-29 14:06           ` Peter Maydell
2019-01-10 12:17 ` [Qemu-devel] [PATCH 07/11] target/arm: Set btype for indirect branches Richard Henderson
2019-01-22 15:28   ` Peter Maydell
2019-01-10 12:17 ` [Qemu-devel] [PATCH 08/11] target/arm: Add guarded_pages cpu property for user-only Richard Henderson
2019-01-22 15:29   ` Peter Maydell
2019-01-22 15:42     ` Richard Henderson
2019-01-22 16:57       ` Peter Maydell
2019-01-28 22:01         ` Richard Henderson
2019-01-10 12:17 ` [Qemu-devel] [PATCH 09/11] target/arm: Enable BTI for -cpu max Richard Henderson
2019-01-22 15:30   ` Peter Maydell
2019-01-10 12:17 ` [Qemu-devel] [PATCH 10/11] linux-user/aarch64: Reset btype for signal handlers Richard Henderson
2019-01-22 15:46   ` Peter Maydell
2019-01-10 12:17 ` [Qemu-devel] [PATCH 11/11] tests/tcg/aarch64: Add bti smoke test Richard Henderson
2019-01-31 18:05 ` [Qemu-devel] [PATCH 00/11] target/arm: Implement ARMv8.5-BTI no-reply

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