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From: Richard Henderson <richard.henderson@linaro.org>
To: Philipp Tomsich <philipp.tomsich@vrull.eu>, qemu-devel@nongnu.org
Cc: Christoph Muellner <christoph.muellner@vrull.eu>,
	Kito Cheng <kito.cheng@sifive.com>,
	Alistair Francis <alistair.francis@wdc.com>
Subject: Re: [PATCH v4 2/2] target/riscv: redirect XVentanaCondOps to use the Zicond functions
Date: Mon, 6 Mar 2023 10:26:39 -0800	[thread overview]
Message-ID: <b52ea430-0055-52c6-9b6b-38d8c1aa3cb8@linaro.org> (raw)
In-Reply-To: <20230306152303.281313-2-philipp.tomsich@vrull.eu>

On 3/6/23 07:23, Philipp Tomsich wrote:
> The Zicond standard extension implements the same instruction
> semantics as XVentanaCondOps, although using different mnemonics and
> opcodes.
> 
> Point XVentanaCondOps to the (newly implemented) Zicond implementation
> to reduce the future maintenance burden.
> 
> Also updating MAINTAINERS as trans_xventanacondops.c.inc.
> 
> Signed-off-by: Philipp Tomsich<philipp.tomsich@vrull.eu>
> ---

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~


  reply	other threads:[~2023-03-06 18:26 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-06 15:23 [PATCH v4 1/2] target/riscv: refactor Zicond support Philipp Tomsich
2023-03-06 15:23 ` [PATCH v4 2/2] target/riscv: redirect XVentanaCondOps to use the Zicond functions Philipp Tomsich
2023-03-06 18:26   ` Richard Henderson [this message]
2023-03-06 18:24 ` [PATCH v4 1/2] target/riscv: refactor Zicond support Richard Henderson

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