From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:46950) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R8rtB-0004rw-1W for qemu-devel@nongnu.org; Wed, 28 Sep 2011 07:01:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1R8rt2-0004EZ-6m for qemu-devel@nongnu.org; Wed, 28 Sep 2011 07:01:20 -0400 Received: from goliath.siemens.de ([192.35.17.28]:20927) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R8rt1-0004Dd-PS for qemu-devel@nongnu.org; Wed, 28 Sep 2011 07:01:12 -0400 From: Jan Kiszka Date: Wed, 28 Sep 2011 13:00:53 +0200 Message-Id: In-Reply-To: References: In-Reply-To: References: Subject: [Qemu-devel] [PATCH 07/22] i8259: Move pic_set_irq1 after pic_update_irq List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori , qemu-devel Cc: Blue Swirl We are about to call the latter from the former. No functional changes. Signed-off-by: Jan Kiszka --- hw/i8259.c | 55 +++++++++++++++++++++++++++++-------------------------- 1 files changed, 29 insertions(+), 26 deletions(-) diff --git a/hw/i8259.c b/hw/i8259.c index f1d58ba..de2d5ca 100644 --- a/hw/i8259.c +++ b/hw/i8259.c @@ -79,32 +79,6 @@ static uint64_t irq_count[16]; #endif PicState2 *isa_pic; -/* set irq level. If an edge is detected, then the IRR is set to 1 */ -static void pic_set_irq1(PicState *s, int irq, int level) -{ - int mask; - mask = 1 << irq; - if (s->elcr & mask) { - /* level triggered */ - if (level) { - s->irr |= mask; - s->last_irr |= mask; - } else { - s->irr &= ~mask; - s->last_irr &= ~mask; - } - } else { - /* edge triggered */ - if (level) { - if ((s->last_irr & mask) == 0) - s->irr |= mask; - s->last_irr |= mask; - } else { - s->last_irr &= ~mask; - } - } -} - /* return the highest priority found in mask (highest = smallest number). Return 8 if no irq */ static int get_priority(PicState *s, int mask) @@ -144,6 +118,8 @@ static int pic_get_irq(PicState *s) } } +static void pic_set_irq1(PicState *s, int irq, int level); + /* raise irq to CPU if necessary. must be called every time the active irq may change */ static void pic_update_irq(PicState2 *s) @@ -178,6 +154,33 @@ static void pic_update_irq(PicState2 *s) } } +/* set irq level. If an edge is detected, then the IRR is set to 1 */ +static void pic_set_irq1(PicState *s, int irq, int level) +{ + int mask; + mask = 1 << irq; + if (s->elcr & mask) { + /* level triggered */ + if (level) { + s->irr |= mask; + s->last_irr |= mask; + } else { + s->irr &= ~mask; + s->last_irr &= ~mask; + } + } else { + /* edge triggered */ + if (level) { + if ((s->last_irr & mask) == 0) { + s->irr |= mask; + } + s->last_irr |= mask; + } else { + s->last_irr &= ~mask; + } + } +} + #ifdef DEBUG_IRQ_LATENCY int64_t irq_time[16]; #endif -- 1.7.3.4