From: Richard Henderson <richard.henderson@linaro.org>
To: Jason Thorpe <thorpej@me.com>, qemu-devel@nongnu.org
Subject: Re: [PATCH 6/8] Provide interrupt mapping information in PCI config registers.
Date: Sat, 5 Jun 2021 18:49:35 -0700 [thread overview]
Message-ID: <b58dc5ca-3082-3a21-dc76-1547b6435927@linaro.org> (raw)
In-Reply-To: <20210603035317.6814-7-thorpej@me.com>
On 6/2/21 8:53 PM, Jason Thorpe wrote:
> Use system-specific information to program the interrupt line register
> with the interrupt mappings, which is what the SRM console does on real
> hardware; some operating systems (e.g. NetBSD) use this information
> rather than having interrupt mappings tables for every possible system
> variation.
>
> Signed-off-by: Jason Thorpe <thorpej@me.com>
Thanks.
> + /* Map the interrupt and program the IRQ into the line register.
> + Some operating systems rely on the Console providing this information
> + in order to avoid having mapping tables for every possible system
> + variation. */
> +
> + const uint8_t pin = pci_config_readb(bdf, PCI_INTERRUPT_PIN);
> + const uint8_t slot = PCI_SLOT(bdf);
> + const int irq = MAP_PCI_INTERRUPT(slot, pin, class_id);
> +
> + if (irq == -1)
> + {
> + /* No interrupt mapping. */
> + pci_config_writeb(bdf, PCI_INTERRUPT_LINE, 0xff);
> + }
> + else
> + {
> + pci_config_writeb(bdf, PCI_INTERRUPT_LINE, irq);
> + }
I've folded this non-distinction into the functional interface.
> +#define MAP_PCI_INTERRUPT(SLOT, PIN, CLASS_ID) \
I've turned this into a static inline.
r~
next prev parent reply other threads:[~2021-06-06 1:50 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-03 3:53 [PATCH 0/8] PALcode fixes required to run NetBSD/alpha Jason Thorpe
2021-06-03 3:53 ` [PATCH 1/8] Make qemu-palcode build environment standalone. NFC Jason Thorpe
2021-06-05 23:27 ` Richard Henderson
2021-06-03 3:53 ` [PATCH 2/8] Fix delivery of unaligned access exceptions Jason Thorpe
2021-06-05 23:28 ` Richard Henderson
2021-06-03 3:53 ` [PATCH 3/8] Fix initialization of the hwrpb.hwrpb.cpuid field Jason Thorpe
2021-06-06 0:28 ` Richard Henderson
2021-06-03 3:53 ` [PATCH 4/8] Make some PCI macros available to other files. NFC Jason Thorpe
2021-06-06 0:32 ` Richard Henderson
2021-06-03 3:53 ` [PATCH 5/8] Fix incorrect initialization of PCI BARs Jason Thorpe
2021-06-03 9:24 ` Philippe Mathieu-Daudé
2021-06-04 18:23 ` Jason Thorpe
2021-06-06 0:41 ` Richard Henderson
2021-06-03 3:53 ` [PATCH 6/8] Provide interrupt mapping information in PCI config registers Jason Thorpe
2021-06-06 1:49 ` Richard Henderson [this message]
2021-06-03 3:53 ` [PATCH 7/8] Provide a Console Terminal Block in the HWRPB Jason Thorpe
2021-06-06 19:27 ` Richard Henderson
2021-06-06 20:12 ` Jason Thorpe
2021-06-03 3:53 ` [PATCH 8/8] Fixes for seconday CPU start-up Jason Thorpe
2021-06-06 20:27 ` Richard Henderson
2021-06-03 9:26 ` [PATCH 0/8] PALcode fixes required to run NetBSD/alpha Philippe Mathieu-Daudé
2021-06-06 20:30 ` Richard Henderson
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