From: Harsh Prateek Bora <harshpb@linux.ibm.com>
To: Nicholas Piggin <npiggin@gmail.com>, qemu-ppc@nongnu.org
Cc: "Caleb Schlossin" <calebs@linux.vnet.ibm.com>,
"Cédric Le Goater" <clg@kaod.org>,
"Frédéric Barrat" <fbarrat@linux.ibm.com>,
"Daniel Henrique Barboza" <danielhb413@gmail.com>,
qemu-devel@nongnu.org
Subject: Re: [RFC PATCH 01/10] ppc/pnv: Add pointer from PnvCPUState to PnvCore
Date: Tue, 28 May 2024 11:49:56 +0530 [thread overview]
Message-ID: <b59c7ab1-7671-4c84-9a16-ce571138f4c1@linux.ibm.com> (raw)
In-Reply-To: <20240526122612.473476-2-npiggin@gmail.com>
On 5/26/24 17:56, Nicholas Piggin wrote:
> This helps move core state from CPU to core structures.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
> include/hw/ppc/pnv_core.h | 1 +
> hw/ppc/pnv_core.c | 3 +++
> 2 files changed, 4 insertions(+)
>
> diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h
> index c6d62fd145..30c1e5b1a3 100644
> --- a/include/hw/ppc/pnv_core.h
> +++ b/include/hw/ppc/pnv_core.h
> @@ -54,6 +54,7 @@ struct PnvCoreClass {
> #define PNV_CORE_TYPE_NAME(cpu_model) cpu_model PNV_CORE_TYPE_SUFFIX
>
> typedef struct PnvCPUState {
> + PnvCore *core;
Naming it *pc might be more intuitive with the most of its usage,
although I see few usage as "pnv_core" as well.
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
> Object *intc;
> } PnvCPUState;
>
> diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
> index f40ab721d6..7b0ea7812b 100644
> --- a/hw/ppc/pnv_core.c
> +++ b/hw/ppc/pnv_core.c
> @@ -225,6 +225,7 @@ static const MemoryRegionOps pnv_core_power10_xscom_ops = {
> static void pnv_core_cpu_realize(PnvCore *pc, PowerPCCPU *cpu, Error **errp,
> int thread_index)
> {
> + PnvCPUState *pnv_cpu = pnv_cpu_state(cpu);
> CPUPPCState *env = &cpu->env;
> int core_hwid;
> ppc_spr_t *pir = &env->spr_cb[SPR_PIR];
> @@ -232,6 +233,8 @@ static void pnv_core_cpu_realize(PnvCore *pc, PowerPCCPU *cpu, Error **errp,
> Error *local_err = NULL;
> PnvChipClass *pcc = PNV_CHIP_GET_CLASS(pc->chip);
>
> + pnv_cpu->core = pc;
> +
> if (!qdev_realize(DEVICE(cpu), NULL, errp)) {
> return;
> }
next prev parent reply other threads:[~2024-05-28 6:21 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-26 12:26 [RFC PATCH 00/10] ppc/pnv: Better big-core model, lpar-per-core, PC unit Nicholas Piggin
2024-05-26 12:26 ` [RFC PATCH 01/10] ppc/pnv: Add pointer from PnvCPUState to PnvCore Nicholas Piggin
2024-05-27 15:23 ` Cédric Le Goater
2024-05-28 6:19 ` Harsh Prateek Bora [this message]
2024-05-26 12:26 ` [RFC PATCH 02/10] ppc/pnv: Move timebase state into PnvCore Nicholas Piggin
2024-05-28 6:28 ` Harsh Prateek Bora
2024-05-28 7:52 ` Cédric Le Goater
2024-05-29 0:19 ` Nicholas Piggin
2024-05-26 12:26 ` [RFC PATCH 03/10] target/ppc: Improve SPR indirect registers Nicholas Piggin
2024-05-28 6:50 ` Harsh Prateek Bora
2024-05-29 0:13 ` Nicholas Piggin
2024-05-26 12:26 ` [RFC PATCH 04/10] ppc/pnv: specialise init for powernv8/9/10 machines Nicholas Piggin
2024-05-28 7:10 ` Harsh Prateek Bora
2024-05-28 7:45 ` Cédric Le Goater
2024-05-29 0:18 ` Nicholas Piggin
2024-05-26 12:26 ` [RFC PATCH 05/10] ppc/pnv: Extend chip_pir class method to TIR as well Nicholas Piggin
2024-05-28 8:32 ` Harsh Prateek Bora
2024-05-29 0:24 ` Nicholas Piggin
2024-05-29 6:30 ` Cédric Le Goater
2024-05-30 6:38 ` Nicholas Piggin
2024-05-30 6:42 ` Cédric Le Goater
2024-05-26 12:26 ` [RFC PATCH 06/10] ppc: Add a core_index to CPUPPCState for SMT vCPUs Nicholas Piggin
2024-05-28 8:48 ` Harsh Prateek Bora
2024-05-28 8:52 ` Harsh Prateek Bora
2024-05-29 0:28 ` Nicholas Piggin
2024-05-26 12:26 ` [RFC PATCH 07/10] target/ppc: Add helpers to check for SMT sibling threads Nicholas Piggin
2024-05-28 9:16 ` Harsh Prateek Bora
2024-05-29 0:31 ` Nicholas Piggin
2024-05-29 6:34 ` Cédric Le Goater
2024-05-30 6:38 ` Nicholas Piggin
2024-05-26 12:26 ` [RFC PATCH 08/10] ppc/pnv: Invert the design for big-core machine modelling Nicholas Piggin
2024-05-29 6:57 ` Cédric Le Goater
2024-05-30 6:52 ` Nicholas Piggin
2024-05-30 7:46 ` Cédric Le Goater
2024-06-03 5:22 ` Nicholas Piggin
2024-05-29 10:49 ` Harsh Prateek Bora
2024-05-26 12:26 ` [RFC PATCH 09/10] ppc/pnv: Implement POWER10 PC xscom registers for direct controls Nicholas Piggin
2024-05-29 7:00 ` Cédric Le Goater
2024-05-30 6:53 ` Nicholas Piggin
2024-05-26 12:26 ` [RFC PATCH 10/10] ppc/pnv: Add an LPAR per core machine option Nicholas Piggin
2024-05-29 7:02 ` Cédric Le Goater
2024-05-27 6:25 ` [RFC PATCH 00/10] ppc/pnv: Better big-core model, lpar-per-core, PC unit Cédric Le Goater
2024-05-27 7:32 ` Nicholas Piggin
2024-05-27 7:36 ` Cédric Le Goater
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