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From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
	qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: patches@linaro.org
Subject: Re: [Qemu-devel] [PATCH 10/20] nvic: Add NS alias SCS region
Date: Tue, 29 Aug 2017 09:00:12 -0700	[thread overview]
Message-ID: <b59d3474-15e4-7f01-d4d7-8ca0fcfef6b5@linaro.org> (raw)
In-Reply-To: <1503414539-28762-11-git-send-email-peter.maydell@linaro.org>

On 08/22/2017 08:08 AM, Peter Maydell wrote:
> +    regionlen = arm_feature(&s->cpu->env, ARM_FEATURE_V8) ? 0x21000 : 0x1000;
> +    memory_region_init(&s->container, OBJECT(s), "nvic", regionlen);
>      /* The system register region goes at the bottom of the priority
>       * stack as it covers the whole page.
>       */
> @@ -1185,6 +1242,13 @@ static void armv7m_nvic_realize(DeviceState *dev, Error **errp)
>                                          sysbus_mmio_get_region(systick_sbd, 0),
>                                          1);
>  
> +    if (arm_feature(&s->cpu->env, ARM_FEATURE_V8)) {
> +        memory_region_init_io(&s->sysreg_ns_mem, OBJECT(s),
> +                              &nvic_sysreg_ns_ops, s,
> +                              "nvic_sysregs_ns", 0x1000);
> +        memory_region_add_subregion(&s->container, 0x20000, &s->sysreg_ns_mem);

There's a whole in between the two regions, which you are leaving mapped.  Why
create a sub-region instead of two separate top-level regions for which you can
leave the whole unmapped?


r~

  reply	other threads:[~2017-08-29 16:00 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-22 15:08 [Qemu-devel] [PATCH 00/20] first steps towards v8M support Peter Maydell
2017-08-22 15:08 ` [Qemu-devel] [PATCH 01/20] target/arm: Implement ARMv8M's PMSAv8 registers Peter Maydell
2017-08-29 15:21   ` Richard Henderson
2017-09-05 19:16   ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé
2017-09-05 21:28     ` Peter Maydell
2017-08-22 15:08 ` [Qemu-devel] [PATCH 02/20] target/arm: Implement new PMSAv8 behaviour Peter Maydell
2017-08-29 15:25   ` Richard Henderson
2017-08-22 15:08 ` [Qemu-devel] [PATCH 03/20] target/arm: Add state field, feature bit and migration for v8M secure state Peter Maydell
2017-08-29 15:28   ` Richard Henderson
2017-09-05 23:09     ` Philippe Mathieu-Daudé
2017-08-22 15:08 ` [Qemu-devel] [PATCH 04/20] target/arm: Register second AddressSpace for secure v8M CPUs Peter Maydell
2017-08-29 15:29   ` Richard Henderson
2017-08-22 15:08 ` [Qemu-devel] [PATCH 05/20] target/arm: Add MMU indexes for secure v8M Peter Maydell
2017-08-25  9:34   ` [Qemu-devel] [Qemu-arm] " Peter Maydell
2017-08-29 15:36   ` [Qemu-devel] " Richard Henderson
2017-08-22 15:08 ` [Qemu-devel] [PATCH 06/20] target/arm: Make BASEPRI register banked for v8M Peter Maydell
2017-08-29 15:37   ` Richard Henderson
2017-09-05 22:45   ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé
2017-09-05 22:53     ` Philippe Mathieu-Daudé
2017-08-22 15:08 ` [Qemu-devel] [PATCH 07/20] target/arm: Make PRIMASK " Peter Maydell
2017-08-29 15:38   ` Richard Henderson
2017-09-05 22:53     ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé
2017-08-22 15:08 ` [Qemu-devel] [PATCH 08/20] target/arm: Make FAULTMASK " Peter Maydell
2017-08-29 15:41   ` Richard Henderson
2017-08-22 15:08 ` [Qemu-devel] [PATCH 09/20] target/arm: Make CONTROL " Peter Maydell
2017-08-29 15:43   ` Richard Henderson
2017-09-05 22:54     ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé
2017-08-22 15:08 ` [Qemu-devel] [PATCH 10/20] nvic: Add NS alias SCS region Peter Maydell
2017-08-29 16:00   ` Richard Henderson [this message]
2017-09-05 16:26     ` Peter Maydell
2017-09-05 16:48       ` Richard Henderson
2017-09-05 17:09         ` Peter Maydell
2017-08-22 15:08 ` [Qemu-devel] [PATCH 11/20] target/arm: Make VTOR register banked for v8M Peter Maydell
2017-08-29 16:02   ` Richard Henderson
2017-08-22 15:08 ` [Qemu-devel] [PATCH 12/20] target/arm: Make MPU_MAIR0, MPU_MAIR1 registers " Peter Maydell
2017-08-29 16:02   ` Richard Henderson
2017-09-05 22:59   ` Philippe Mathieu-Daudé
2017-08-22 15:08 ` [Qemu-devel] [PATCH 13/20] target/arm: Make MPU_RBAR, MPU_RLAR " Peter Maydell
2017-08-29 16:04   ` Richard Henderson
2017-09-05 23:02   ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé
2017-08-22 15:08 ` [Qemu-devel] [PATCH 14/20] target/arm: Make MPU_RNR register " Peter Maydell
2017-08-29 16:05   ` Richard Henderson
2017-08-29 16:06     ` Peter Maydell
2017-08-29 16:09       ` Richard Henderson
2017-09-05 16:41         ` Peter Maydell
2017-08-22 15:08 ` [Qemu-devel] [PATCH 15/20] target/arm: Make MPU_CTRL " Peter Maydell
2017-08-29 16:06   ` Richard Henderson
2017-08-22 15:08 ` [Qemu-devel] [PATCH 16/20] target/arm: Make CCR " Peter Maydell
2017-08-29 16:08   ` Richard Henderson
2017-09-05 16:39     ` Peter Maydell
2017-08-22 15:08 ` [Qemu-devel] [PATCH 17/20] target/arm: Make MMFAR " Peter Maydell
2017-08-29 16:10   ` Richard Henderson
2017-09-05 23:05     ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé
2017-08-22 15:08 ` [Qemu-devel] [PATCH 18/20] target/arm: Make CFSR register " Peter Maydell
2017-08-29 16:12   ` Richard Henderson
2017-08-22 15:08 ` [Qemu-devel] [PATCH 19/20] target/arm: Move regime_is_secure() to target/arm/internals.h Peter Maydell
2017-08-29 16:12   ` Richard Henderson
2017-09-05 22:51     ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé
2017-08-22 15:08 ` [Qemu-devel] [PATCH 20/20] target/arm: Implement BXNS, and banked stack pointers Peter Maydell
2017-08-29 16:31   ` Richard Henderson
     [not found] <4bdfe2a9431643f5b6265e5198a8620f@svr-ies-mbx-02.mgc.mentorg.com>
2020-06-01 12:17 ` [Qemu-devel] [PATCH 10/20] nvic: Add NS alias SCS region Peter Maydell

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