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[216.180.64.156]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7246a5ceda0sm1592394b3a.1.2024.11.14.10.54.11 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 14 Nov 2024 10:54:11 -0800 (PST) Message-ID: Date: Thu, 14 Nov 2024 10:54:11 -0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 45/54] target/rx: Convert to TCGCPUOps.tlb_fill_align Content-Language: en-US To: Richard Henderson , qemu-devel@nongnu.org References: <20241114160131.48616-1-richard.henderson@linaro.org> <20241114160131.48616-46-richard.henderson@linaro.org> From: Pierrick Bouvier In-Reply-To: <20241114160131.48616-46-richard.henderson@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=pierrick.bouvier@linaro.org; helo=mail-pg1-x531.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 11/14/24 08:01, Richard Henderson wrote: > Signed-off-by: Richard Henderson > --- > target/rx/cpu.c | 19 +++++++++++-------- > 1 file changed, 11 insertions(+), 8 deletions(-) > > diff --git a/target/rx/cpu.c b/target/rx/cpu.c > index 65a74ce720..c83a582141 100644 > --- a/target/rx/cpu.c > +++ b/target/rx/cpu.c > @@ -161,16 +161,19 @@ static void rx_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) > info->print_insn = print_insn_rx; > } > > -static bool rx_cpu_tlb_fill(CPUState *cs, vaddr addr, int size, > - MMUAccessType access_type, int mmu_idx, > - bool probe, uintptr_t retaddr) > +static bool rx_cpu_tlb_fill_align(CPUState *cs, CPUTLBEntryFull *out, > + vaddr addr, MMUAccessType access_type, > + int mmu_idx, MemOp memop, int size, > + bool probe, uintptr_t retaddr) > { > - uint32_t address, physical, prot; > + /* TODO: alignment faults not currently handled. */ > > /* Linear mapping */ > - address = physical = addr & TARGET_PAGE_MASK; > - prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; > - tlb_set_page(cs, address, physical, prot, mmu_idx, TARGET_PAGE_SIZE); > + memset(out, 0, sizeof(*out)); > + out->phys_addr = addr; > + out->prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; > + out->lg_page_size = TARGET_PAGE_BITS; > + out->attrs = MEMTXATTRS_UNSPECIFIED; > return true; > } > > @@ -195,7 +198,7 @@ static const TCGCPUOps rx_tcg_ops = { > .initialize = rx_translate_init, > .synchronize_from_tb = rx_cpu_synchronize_from_tb, > .restore_state_to_opc = rx_restore_state_to_opc, > - .tlb_fill = rx_cpu_tlb_fill, > + .tlb_fill_align = rx_cpu_tlb_fill_align, > > #ifndef CONFIG_USER_ONLY > .cpu_exec_interrupt = rx_cpu_exec_interrupt, Reviewed-by: Pierrick Bouvier