From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-devel@nongnu.org, deller@kernel.org, alex.bennee@linaro.org,
linux-parisc@vger.kernel.org, qemu-arm@nongnu.org
Subject: Re: [PATCH v3 06/20] accel/tcg: Use the alignment test in tlb_fill_align
Date: Fri, 11 Oct 2024 08:22:51 -0700 [thread overview]
Message-ID: <b5bf5d17-2451-4d6e-9a4e-6fb4e94ad308@linaro.org> (raw)
In-Reply-To: <CAFEAcA-mSsFgjoBWi13dXqZUbys2N81YVXLD_ZfuuGo+Xfy-gQ@mail.gmail.com>
On 10/10/24 03:44, Peter Maydell wrote:
> On Wed, 9 Oct 2024 at 01:05, Richard Henderson
> <richard.henderson@linaro.org> wrote:
>>
>> When we have a tlb miss, defer the alignment check to
>> the new tlb_fill_align hook. Move the existing alignment
>> check so that we only perform it with a tlb hit.
>>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>
>
>> @@ -1754,8 +1767,8 @@ static bool mmu_lookup(CPUState *cpu, vaddr addr, MemOpIdx oi,
>> * Lookup both pages, recognizing exceptions from either. If the
>> * second lookup potentially resized, refresh first CPUTLBEntryFull.
>> */
>> - mmu_lookup1(cpu, &l->page[0], l->mmu_idx, type, ra);
>> - if (mmu_lookup1(cpu, &l->page[1], l->mmu_idx, type, ra)) {
>> + mmu_lookup1(cpu, &l->page[0], l->memop, l->mmu_idx, type, ra);
>> + if (mmu_lookup1(cpu, &l->page[1], 0, l->mmu_idx, type, ra)) {
>
> Is 0 the right thing here ? Given that alignment-requirements can
> differ per-page, what happens for the case of an unaligned access
> that crosses a page boundary where the first page is "memory that
> doesn't care about alignment" and the second page is "memory that
> does enforce alignment" ?
I can't think of anything else that makes sense. The access to the second page is
"aligned" in the sense that it begins at offset 0.
Anyway, alignment as a page property is unique to Arm and...
> For Arm this is moot, because an access that crosses a page
> boundary into something with different memory attributes is
> CONSTRAINED UNPREDICTABLE (per Arm ARM rev K.a B2.15.3), but
> maybe other architectures are less flexible.
... as you say.
> Also, the comment does say "recognizing exceptions from either",
> and we aren't going to do that for alignment issues in page 2,
> so if we're OK with ignoring this we should update the comment.
The second page can still raise page faults. How would you re-word this?
r~
next prev parent reply other threads:[~2024-10-11 17:13 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-09 0:04 [PATCH v3 00/20] accel/tcg: Introduce tlb_fill_align hook Richard Henderson
2024-10-09 0:04 ` [PATCH v3 01/20] accel/tcg: Assert noreturn from write-only page for atomics Richard Henderson
2024-10-09 0:04 ` [PATCH v3 02/20] include/exec/memop: Move get_alignment_bits from tcg.h Richard Henderson
2024-10-09 0:04 ` [PATCH v3 03/20] include/exec/memop: Rename get_alignment_bits Richard Henderson
2024-10-09 0:04 ` [PATCH v3 04/20] include/exec/memop: Introduce memop_atomicity_bits Richard Henderson
2024-10-09 18:55 ` Philippe Mathieu-Daudé
2024-10-09 0:04 ` [PATCH v3 05/20] accel/tcg: Add TCGCPUOps.tlb_fill_align Richard Henderson
2024-10-09 19:46 ` Helge Deller
2024-10-10 10:31 ` Peter Maydell
2024-10-09 0:04 ` [PATCH v3 06/20] accel/tcg: Use the alignment test in tlb_fill_align Richard Henderson
2024-10-09 21:29 ` Helge Deller
2024-10-10 10:44 ` Peter Maydell
2024-10-11 15:22 ` Richard Henderson [this message]
2024-10-11 15:36 ` Peter Maydell
2024-10-09 0:04 ` [PATCH v3 07/20] target/hppa: Add MemOp argument to hppa_get_physical_address Richard Henderson
2024-10-09 0:04 ` [PATCH v3 08/20] target/hppa: Perform access rights before protection id check Richard Henderson
2024-10-09 0:04 ` [PATCH v3 09/20] target/hppa: Fix priority of T, D, and B page faults Richard Henderson
2024-10-14 18:02 ` Michael Tokarev
2024-10-14 19:31 ` Richard Henderson
2024-10-14 20:17 ` Michael Tokarev
2024-10-09 0:04 ` [PATCH v3 10/20] target/hppa: Handle alignment faults in hppa_get_physical_address Richard Henderson
2024-10-09 0:04 ` [PATCH v3 11/20] target/hppa: Implement TCGCPUOps.tlb_fill_align Richard Henderson
2024-10-09 21:33 ` Helge Deller
2024-10-09 0:04 ` [PATCH v3 12/20] target/arm: Pass MemOp to get_phys_addr Richard Henderson
2024-10-09 0:04 ` [PATCH v3 13/20] target/arm: Pass MemOp to get_phys_addr_with_space_nogpc Richard Henderson
2024-10-09 0:04 ` [PATCH v3 14/20] target/arm: Pass MemOp to get_phys_addr_gpc Richard Henderson
2024-10-09 0:04 ` [PATCH v3 15/20] target/arm: Pass MemOp to get_phys_addr_nogpc Richard Henderson
2024-10-09 0:04 ` [PATCH v3 16/20] target/arm: Pass MemOp through get_phys_addr_twostage Richard Henderson
2024-10-09 0:04 ` [PATCH v3 17/20] target/arm: Pass MemOp to get_phys_addr_lpae Richard Henderson
2024-10-09 0:04 ` [PATCH v3 18/20] target/arm: Move device detection earlier in get_phys_addr_lpae Richard Henderson
2024-10-09 0:04 ` [PATCH v3 19/20] target/arm: Implement TCGCPUOps.tlb_fill_align Richard Henderson
2024-10-10 11:54 ` Peter Maydell
2024-10-09 0:04 ` [PATCH v3 20/20] target/arm: Fix alignment fault priority in get_phys_addr_lpae Richard Henderson
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