From: Bruce Rogers <BROGERS@suse.com>
To: "ehabkost@redhat.com" <ehabkost@redhat.com>,
"cathy.zhang@intel.com" <cathy.zhang@intel.com>
Cc: "pbonzini@redhat.com" <pbonzini@redhat.com>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
"rth@twiddle.net" <rth@twiddle.net>
Subject: Re: [Resend PATCH 0/3] Add CPU model for intel processor Cooper Lake
Date: Mon, 11 Nov 2019 17:31:28 +0000 [thread overview]
Message-ID: <b63dfa9a201405b5f64e891a42c2f8dd80961cda.camel@suse.com> (raw)
In-Reply-To: <20191024025218.GL6744@habkost.net>
On Wed, 2019-10-23 at 23:52 -0300, Eduardo Habkost wrote:
> On Tue, Oct 22, 2019 at 03:35:25PM +0800, Cathy Zhang wrote:
> > This patchset is to add CPU model for intel processor Cooper Lake.
> > It
> > will inherit features from the existing CPU model Cascadelake-
> > Server,
> > meanwhile, add the platform associated new instruction and feature
> > for speculative execution which the host supports. There are
> > associated
> > feature bit and macro defined here as needed.
>
> Queued, thanks.
>
> > Cathy Zhang (3):
> > i386: Add MSR feature bit for MDS-NO
> > i386: Add macro for stibp
> > i386: Add new CPU model Cooperlake
> >
> > target/i386/cpu.c | 60
> > +++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > target/i386/cpu.h | 3 +++
> > 2 files changed, 63 insertions(+)
> >
Hi Eduardo,
Is this going to make it into v4.2?
Regards,
Bruce
prev parent reply other threads:[~2019-11-11 17:35 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-22 7:35 [Resend PATCH 0/3] Add CPU model for intel processor Cooper Lake Cathy Zhang
2019-10-22 7:35 ` [Resend PATCH 1/3] i386: Add MSR feature bit for MDS-NO Cathy Zhang
2019-10-22 7:35 ` [Resend PATCH 2/3] i386: Add macro for stibp Cathy Zhang
2019-10-22 7:35 ` [Resend PATCH 3/3] i386: Add new CPU model Cooperlake Cathy Zhang
2019-10-24 16:58 ` Bruce Rogers
2019-10-24 2:52 ` [Resend PATCH 0/3] Add CPU model for intel processor Cooper Lake Eduardo Habkost
2019-11-11 17:31 ` Bruce Rogers [this message]
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