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Mon, 27 May 2024 08:58:13 -0700 (PDT) Message-ID: Date: Mon, 27 May 2024 17:58:11 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 09/16] aspeed/smc: Add AST2700 support To: Jamin Lin , =?UTF-8?Q?C=C3=A9dric_Le_Goater?= , Peter Maydell , Andrew Jeffery , Joel Stanley , Alistair Francis , Cleber Rosa , Wainer dos Santos Moschetta , Beraldo Leal , "open list:ASPEED BMCs" , "open list:All patches CC here" Cc: troy_lee@aspeedtech.com, yunlin.tang@aspeedtech.com References: <20240527080231.1576609-1-jamin_lin@aspeedtech.com> <20240527080231.1576609-10-jamin_lin@aspeedtech.com> Content-Language: en-US From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20240527080231.1576609-10-jamin_lin@aspeedtech.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi, On 27/5/24 10:02, Jamin Lin wrote: > AST2700 fmc/spi controller's address decoding unit is 64KB > and only bits [31:16] are used for decoding. Introduce seg_to_reg > and reg_to_seg handlers for ast2700 fmc/spi controller. > In addition, adds ast2700 fmc, spi0, spi1, and spi2 class init handler. > > Signed-off-by: Troy Lee > Signed-off-by: Jamin Lin > Reviewed-by: Cédric Le Goater > --- > hw/ssi/aspeed_smc.c | 222 +++++++++++++++++++++++++++++++++++++++++++- > 1 file changed, 220 insertions(+), 2 deletions(-) > > diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c > index df0c63469c..b4006c8339 100644 > --- a/hw/ssi/aspeed_smc.c > +++ b/hw/ssi/aspeed_smc.c > @@ -185,7 +185,7 @@ > * 0: 4 bytes > * 0x1FFFFFC: 32M bytes > * > - * DMA length is from 1 byte to 32MB (AST2600, AST10x0) > + * DMA length is from 1 byte to 32MB (AST2600, AST10x0 and AST2700) > * 0: 1 byte > * 0x1FFFFFF: 32M bytes > */ > @@ -670,7 +670,7 @@ static const MemoryRegionOps aspeed_smc_flash_ops = { > .endianness = DEVICE_LITTLE_ENDIAN, > .valid = { > .min_access_size = 1, > - .max_access_size = 4, > + .max_access_size = 8, Is this a bugfix? If so, please use a separate patch. Otherwise please mention why it is OK to widen access for AST2600 & AST10x0. Thanks, Phil. > }, > };