From: WANG Xuerui <i.qemu@xen0n.name>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Subject: Re: [PATCH v2 29/30] accel/tcg/user-exec: Implement CPU-specific signal handler for loongarch64 hosts
Date: Thu, 23 Sep 2021 01:35:03 +0800 [thread overview]
Message-ID: <b6411271-105e-0661-9252-a3c9ca140115@xen0n.name> (raw)
In-Reply-To: <9e95577b-3c91-5ea0-fe0d-d14dd0bc079b@linaro.org>
Hi Richard,
On 9/23/21 00:51, Richard Henderson wrote:
> On 9/21/21 1:19 PM, WANG Xuerui wrote:
>> + case 0b00011111110: /* stle.w */
>> + case 0b00011111111: /* stle.d */
>> + is_write = 1;
>> + break;
>> + default:
>> + /* test for am* instruction range */
>> + if (0b00011000000 <= sel && sel <= 0b00011100011) {
>> + is_write = 1;
>> + }
>
> Probably better to fold the range check into the switch with
>
> case 0b00011000000 ... 0b00011100011: /* am* insn range */
I just googled this particular syntax; it looks like a GCC-only
extension, but is already used in a few places inside QEMU. So I think
I'll take this advice and just make the range another switch arm.
next prev parent reply other threads:[~2021-09-22 17:37 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-21 20:18 [PATCH v2 00/30] LoongArch64 port of QEMU TCG WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 01/30] elf: Add machine type value for LoongArch WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 02/30] MAINTAINERS: Add tcg/loongarch64 entry with myself as maintainer WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 03/30] tcg/loongarch64: Add the tcg-target.h file WANG Xuerui
2021-09-22 3:55 ` Richard Henderson
2021-09-22 4:33 ` WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 04/30] tcg/loongarch64: Add generated instruction opcodes and encoding helpers WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 05/30] tcg/loongarch64: Add register names, allocation order and input/output sets WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 06/30] tcg/loongarch64: Define the operand constraints WANG Xuerui
2021-09-22 3:59 ` Richard Henderson
2021-09-21 20:18 ` [PATCH v2 07/30] tcg/loongarch64: Implement necessary relocation operations WANG Xuerui
2021-09-22 4:02 ` Richard Henderson
2021-09-21 20:18 ` [PATCH v2 08/30] tcg/loongarch64: Implement the memory barrier op WANG Xuerui
2021-09-22 4:03 ` Richard Henderson
2021-09-21 20:18 ` [PATCH v2 09/30] tcg/loongarch64: Implement tcg_out_mov and tcg_out_movi WANG Xuerui
2021-09-22 4:25 ` Richard Henderson
2021-09-22 15:16 ` WANG Xuerui
2021-09-22 15:17 ` Richard Henderson
2021-09-22 17:22 ` WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 10/30] tcg/loongarch64: Implement goto_ptr WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 11/30] tcg/loongarch64: Implement sign-/zero-extension ops WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 12/30] tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc/eqv ops WANG Xuerui
2021-09-22 4:35 ` Richard Henderson
2021-09-22 17:23 ` WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 13/30] tcg/loongarch64: Implement deposit/extract ops WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 14/30] tcg/loongarch64: Implement bswap32_i32/bswap32_i64/bswap64_i64 WANG Xuerui
2021-09-22 14:54 ` Richard Henderson
2021-09-22 17:24 ` WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 15/30] tcg/loongarch64: Implement clz/ctz ops WANG Xuerui
2021-09-22 14:57 ` Richard Henderson
2021-09-21 20:19 ` [PATCH v2 16/30] tcg/loongarch64: Implement shl/shr/sar/rotl/rotr ops WANG Xuerui
2021-09-22 14:59 ` Richard Henderson
2021-09-21 20:19 ` [PATCH v2 17/30] tcg/loongarch64: Implement add/sub ops WANG Xuerui
2021-09-22 15:01 ` Richard Henderson
2021-09-21 20:19 ` [PATCH v2 18/30] tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu ops WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 19/30] tcg/loongarch64: Implement br/brcond ops WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 20/30] tcg/loongarch64: Implement setcond ops WANG Xuerui
2021-09-22 15:13 ` Richard Henderson
2021-09-22 17:26 ` WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 21/30] tcg/loongarch64: Implement tcg_out_call WANG Xuerui
2021-09-22 15:16 ` Richard Henderson
2021-09-21 20:19 ` [PATCH v2 22/30] tcg/loongarch64: Implement simple load/store ops WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 23/30] tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops WANG Xuerui
2021-09-22 16:29 ` Richard Henderson
2021-09-22 17:32 ` WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 24/30] tcg/loongarch64: Implement tcg_target_qemu_prologue WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 25/30] tcg/loongarch64: Implement exit_tb/goto_tb WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 26/30] tcg/loongarch64: Implement tcg_target_init WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 27/30] tcg/loongarch64: Register the JIT WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 28/30] linux-user: Add safe syscall handling for loongarch64 hosts WANG Xuerui
2021-09-22 16:39 ` Richard Henderson
2021-09-21 20:19 ` [PATCH v2 29/30] accel/tcg/user-exec: Implement CPU-specific signal handler " WANG Xuerui
2021-09-22 16:51 ` Richard Henderson
2021-09-22 17:35 ` WANG Xuerui [this message]
2021-09-21 20:19 ` [PATCH v2 30/30] configure, meson.build: Mark support " WANG Xuerui
2021-09-22 16:53 ` Richard Henderson
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