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[83.42.66.234]) by smtp.gmail.com with ESMTPSA id r3sm1870767wrm.51.2020.11.04.02.11.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 04 Nov 2020 02:11:54 -0800 (PST) Subject: Re: [PULL 48/48] hw/timer/armv7m_systick: Rewrite to use ptimers To: Andrew Jones , Peter Maydell References: <20201027114438.17662-1-peter.maydell@linaro.org> <20201027114438.17662-49-peter.maydell@linaro.org> <20201104100357.7t4nnwqot6ahprrh@kamzik.brq.redhat.com> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: Date: Wed, 4 Nov 2020 11:11:53 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.3.1 MIME-Version: 1.0 In-Reply-To: <20201104100357.7t4nnwqot6ahprrh@kamzik.brq.redhat.com> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/11/03 00:03:41 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 11/4/20 11:03 AM, Andrew Jones wrote: > On Tue, Oct 27, 2020 at 11:44:38AM +0000, Peter Maydell wrote: >> The armv7m systick timer is a 24-bit decrementing, wrap-on-zero, >> clear-on-write counter. Our current implementation has various >> bugs and dubious workarounds in it (for instance see >> https://bugs.launchpad.net/qemu/+bug/1872237). >> >> We have an implementation of a simple decrementing counter >> and we put a lot of effort into making sure it handles the >> interesting corner cases (like "spend a cycle at 0 before >> reloading") -- ptimer. >> >> Rewrite the systick timer to use a ptimer rather than >> a raw QEMU timer. >> >> Unfortunately this is a migration compatibility break, >> which will affect all M-profile boards. >> >> Among other bugs, this fixes >> https://bugs.launchpad.net/qemu/+bug/1872237 : >> now writes to SYST_CVR when the timer is enabled correctly >> do nothing; when the timer is enabled via SYST_CSR.ENABLE, >> the ptimer code will (because of POLICY_NO_IMMEDIATE_RELOAD) >> arrange that after one timer tick the counter is reloaded >> from SYST_RVR and then counts down from there, as the >> architecture requires. >> >> Signed-off-by: Peter Maydell >> Reviewed-by: Philippe Mathieu-Daudé >> Message-id: 20201015151829.14656-3-peter.maydell@linaro.org >> --- >> include/hw/timer/armv7m_systick.h | 3 +- >> hw/timer/armv7m_systick.c | 124 +++++++++++++----------------- >> 2 files changed, 54 insertions(+), 73 deletions(-) >> > > Do we also need something like the diff below now? > > > diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig > index fdf4464b9484..7d5d89e1acf9 100644 > --- a/hw/arm/Kconfig > +++ b/hw/arm/Kconfig > @@ -291,6 +291,7 @@ config ZYNQ > > config ARM_V7M > bool > + select PTIMER Oops yes indeed. > > config ALLWINNER_A10 > bool > > > Thanks, > drew > >