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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-475dd035e05sm145547525e9.7.2025.10.27.10.00.17 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 27 Oct 2025 10:00:17 -0700 (PDT) Message-ID: Date: Mon, 27 Oct 2025 18:00:16 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 6/7] hw/pci-host/sabre: Re-use generic pci_host_data_le_ops MemoryRegionOps Content-Language: en-US To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Richard Henderson , Marcel Apfelbaum , Mark Cave-Ayland , Helge Deller References: <20251027165304.98296-1-philmd@linaro.org> <20251027165304.98296-7-philmd@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20251027165304.98296-7-philmd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 27/10/25 17:53, Philippe Mathieu-Daudé wrote: > Avoid duplicating code, re-use the generic generic > pci_host_data_le_ops MemoryRegionOps. > > Signed-off-by: Philippe Mathieu-Daudé > --- > hw/pci-host/sabre.c | 34 +++------------------------------- > hw/pci-host/trace-events | 2 -- > 2 files changed, 3 insertions(+), 33 deletions(-) > > diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c > index 669191b6c7e..eb3dbe3361f 100644 > --- a/hw/pci-host/sabre.c > +++ b/hw/pci-host/sabre.c > @@ -246,28 +246,6 @@ static const MemoryRegionOps sabre_host_config_ops = { > .endianness = DEVICE_BIG_ENDIAN, > }; > > -static void sabre_pci_config_write(void *opaque, hwaddr addr, > - uint64_t val, unsigned size) > -{ > - SabreState *s = opaque; > - PCIHostState *phb = PCI_HOST_BRIDGE(s); > - > - trace_sabre_pci_config_write(addr, val); > - pci_data_write(phb->bus, addr, val, size); > -} > - > -static uint64_t sabre_pci_config_read(void *opaque, hwaddr addr, > - unsigned size) > -{ > - uint32_t ret; > - SabreState *s = opaque; > - PCIHostState *phb = PCI_HOST_BRIDGE(s); > - > - ret = pci_data_read(phb->bus, addr, size); Likely incorrect, please ignore. > - trace_sabre_pci_config_read(addr, ret); > - return ret; > -}