From: Laurent Vivier <laurent@vivier.eu>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: Thomas Huth <huth@tuxfamily.org>
Subject: Re: [Qemu-devel] [PATCH v5 05/17] target/m68k: add CPU_LOG_INT trace
Date: Tue, 2 Jan 2018 19:37:40 +0100 [thread overview]
Message-ID: <b6abdd69-3abf-a887-10db-6e80180f2d1c@vivier.eu> (raw)
In-Reply-To: <ec748459-b9d7-b485-ffd0-11266d229c14@linaro.org>
Le 02/01/2018 à 17:10, Richard Henderson a écrit :
> On 01/01/2018 05:10 PM, Laurent Vivier wrote:
>> Display the interrupts/exceptions information
>> in QEMU logs (-d int)
>>
>> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
>
>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>
>> + if (qemu_loglevel_mask(CPU_LOG_INT)) {
>> + static int count;
>> + qemu_log("INT %6d: %s(%#x) pc=%08x sp=%08x sr=%04x\n",
>> + ++count, m68k_exception_name(cs->exception_index),
>> + vector, env->pc, env->aregs[7], env->sr);
>> + }
>> +
>> fmt |= 0x40000000;
>> fmt |= vector << 16;
>> fmt |= env->sr;
>
> Just so long as you're aware that you're printing the SR without CCR here...
I will update the qemu_log() to have the real SR value with the CCR.
Thanks,
Laurent
next prev parent reply other threads:[~2018-01-02 18:37 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-02 1:10 [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) Laurent Vivier
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 01/17] target-m68k: sync CC_OP before gen_jmp_tb() Laurent Vivier
2018-01-02 16:01 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 02/17] target/m68k: fix gen_get_ccr() Laurent Vivier
2018-01-02 16:04 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 03/17] linux-user, m68k: correctly manage SR in context Laurent Vivier
2018-01-02 16:06 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 04/17] target-m68k: use insn_pc to generate instruction fault address Laurent Vivier
2018-01-02 16:08 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 05/17] target/m68k: add CPU_LOG_INT trace Laurent Vivier
2018-01-02 16:10 ` Richard Henderson
2018-01-02 18:37 ` Laurent Vivier [this message]
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 06/17] target/m68k: manage 680x0 stack frames Laurent Vivier
2018-01-02 16:16 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 07/17] target/m68k: add chk and chk2 Laurent Vivier
2018-01-02 16:41 ` Richard Henderson
2018-01-02 23:33 ` Laurent Vivier
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 08/17] target/m68k: add move16 Laurent Vivier
2018-01-02 16:50 ` Richard Henderson
2018-01-02 18:42 ` Laurent Vivier
2018-01-02 23:49 ` Richard Henderson
2018-01-02 23:53 ` Laurent Vivier
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 09/17] target/m68k: softmmu cleanup Laurent Vivier
2018-01-02 16:52 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 10/17] target/m68k: add cpush/cinv Laurent Vivier
2018-01-02 16:53 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 11/17] target/m68k: add reset Laurent Vivier
2018-01-02 16:54 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 12/17] target/m68k: implement fsave/frestore Laurent Vivier
2018-01-02 16:58 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 13/17] target/m68k: move CCR/SR functions Laurent Vivier
2018-01-02 17:00 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 14/17] target/m68k: add 680x0 "move to SR" instruction Laurent Vivier
2018-01-02 17:02 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 15/17] target/m68k: add andi/ori/eori to SR/CCR Laurent Vivier
2018-01-02 17:06 ` Richard Henderson
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 16/17] target/m68k: add the Interrupt Stack Pointer Laurent Vivier
2018-01-02 17:13 ` Richard Henderson
2018-01-02 18:50 ` Laurent Vivier
2018-01-02 1:10 ` [Qemu-devel] [PATCH v5 17/17] target/m68k: fix m68k_cpu_dump_state() Laurent Vivier
2018-01-02 17:14 ` Richard Henderson
2018-01-02 1:31 ` [Qemu-devel] [PATCH v5 00/17] target/m68k: supervisor mode (part 1) no-reply
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