Re: [PATCH v2 11/24] hw/arm/mps2-tz: Correct wrong interrupt numbers for DMA and SPI

[Richard Henderson <richard.henderson@linaro.org>]

On 2/15/21 3:51 AM, Peter Maydell wrote:
> On the MPS2 boards, the first 32 interrupt lines are entirely
> internal to the SSE; interrupt lines for devices outside the SSE
> start at 32.  In the application notes that document each FPGA image,
> the interrupt wiring is documented from the point of view of the CPU,
> so '0' is the first of the SSE's interrupts and the devices in the
> FPGA image itself are '32' and up: so the UART 0 Receive interrupt is
> 32, the SPI #0 interrupt is 51, and so on.
> 
> Within our implementation, because the external interrupts must be
> connected to the EXP_IRQ[0...n] lines of the SSE object, we made the
> get_sse_irq_in() function take an irqno whose values start at 0 for
> the first FPGA device interrupt.  In this numbering scheme the UART 0
> Receive interrupt is 0, the SPI #0 interrupt is 19, and so on.
> 
> The result of these two different numbering schemes has been that
> half of the devices were wired up to the wrong IRQs: the UART IRQs
> are wired up correctly, but the DMA and SPI devices were passing
> start-at-32 values to get_sse_irq_in() and so being mis-connected.
> 
> Fix the bug by making get_sse_irq_in() take values specified with the
> same scheme that the hardware manuals use, to avoid confusion.
> 
> Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
> ---
>   hw/arm/mps2-tz.c | 24 +++++++++++++++++-------
>   1 file changed, 17 insertions(+), 7 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~