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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id h26sm33398pfk.19.2021.05.26.12.28.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 26 May 2021 12:28:35 -0700 (PDT) Subject: Re: Denormal input handling From: Richard Henderson To: morrell@alumni.ucsd.edu, qemu-devel@nongnu.org References: <746277332.296230.1622055775751.ref@mail.yahoo.com> <746277332.296230.1622055775751@mail.yahoo.com> <4bc4444e-782a-311c-719d-091a04e20387@linaro.org> Message-ID: Date: Wed, 26 May 2021 12:28:34 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <4bc4444e-782a-311c-719d-091a04e20387@linaro.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1031.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 5/26/21 12:23 PM, Richard Henderson wrote: > On 5/26/21 12:02 PM, Michael Morrell via wrote: >> I think the behavior should be for denormal inputs that if >> "flush_inputs_to_zero" is true, then set the value to zero (without setting >> the "input denormal" flag); and if "flush_inputs_to_zero" is false, set the >> "input denormal" flag and normalize the input. >> >> This matches what x86 does (I'm not sure about other architectures). > > It is not. > > Intel Architectures SDM Vol 1, Section 11.5.2.2: >   The denormal operand exception is not affected by >   flush-to-zero mode. Ho hum, I misread what you wrote outside the quoted context. Both your suggestion and the current behaviour are wrong for x86. The current behavior is correct for arm. What we need are two separate softfloat flags, one for "any denormal seen on input" and another for "denormal flushed to zero on input". The target emulation code then chooses what set of bits needs exporting to target architecture state. r~