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Tue, 12 Mar 2024 13:44:19 +0000 (GMT) Message-ID: Date: Tue, 12 Mar 2024 19:14:17 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 08/10] ppc/pnv: Set POWER9, POWER10 ibm,pa-features bits Content-Language: en-US To: Nicholas Piggin , qemu-ppc@nongnu.org Cc: qemu-devel@nongnu.org, Daniel Henrique Barboza , David Gibson References: <20240312131419.2196845-1-npiggin@gmail.com> <20240312131419.2196845-9-npiggin@gmail.com> From: Harsh Prateek Bora In-Reply-To: <20240312131419.2196845-9-npiggin@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: nX-hbUb7S1X7d32q65L4KCrTcojDOvCY X-Proofpoint-GUID: oGqrPkuE8EAPESAP9laQB-M0y652xxj9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-12_08,2024-03-12_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 bulkscore=0 spamscore=0 phishscore=0 adultscore=0 mlxlogscore=999 priorityscore=1501 malwarescore=0 impostorscore=0 clxscore=1015 mlxscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2403120105 Received-SPF: pass client-ip=148.163.158.5; envelope-from=harshpb@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 3/12/24 18:44, Nicholas Piggin wrote: > Copy the pa-features arrays from spapr, adjusting slightly as > described in comments. > > Signed-off-by: Nicholas Piggin Although future re-org is expected per discussion on v1, but for now: Reviewed-by: Harsh Prateek Bora > --- > hw/ppc/pnv.c | 67 ++++++++++++++++++++++++++++++++++++++++++++++++-- > hw/ppc/spapr.c | 1 + > 2 files changed, 66 insertions(+), 2 deletions(-) > > diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c > index 52d964f77a..8a502dea90 100644 > --- a/hw/ppc/pnv.c > +++ b/hw/ppc/pnv.c > @@ -332,6 +332,35 @@ static void pnv_chip_power8_dt_populate(PnvChip *chip, void *fdt) > } > } > > +/* > + * Same as spapr pa_features_300 except pnv always enables CI largepages bit. > + */ > +static const uint8_t pa_features_300[] = { 66, 0, > + /* 0: MMU|FPU|SLB|RUN|DABR|NX, 1: CILRG|fri[nzpm]|DABRX|SPRG3|SLB0|PP110 */ > + /* 2: VPM|DS205|PPR|DS202|DS206, 3: LSD|URG, 5: LE|CFAR|EB|LSQ */ > + 0xf6, 0x3f, 0xc7, 0xc0, 0x00, 0xf0, /* 0 - 5 */ > + /* 6: DS207 */ > + 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 - 11 */ > + /* 16: Vector */ > + 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */ > + /* 18: Vec. Scalar, 20: Vec. XOR, 22: HTM */ > + 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 18 - 23 */ > + /* 24: Ext. Dec, 26: 64 bit ftrs, 28: PM ftrs */ > + 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 24 - 29 */ > + /* 32: LE atomic, 34: EBB + ext EBB */ > + 0x00, 0x00, 0x80, 0x00, 0xC0, 0x00, /* 30 - 35 */ > + /* 40: Radix MMU */ > + 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 36 - 41 */ > + /* 42: PM, 44: PC RA, 46: SC vec'd */ > + 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 42 - 47 */ > + /* 48: SIMD, 50: QP BFP, 52: String */ > + 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 48 - 53 */ > + /* 54: DecFP, 56: DecI, 58: SHA */ > + 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 54 - 59 */ > + /* 60: NM atomic, 62: RNG */ > + 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 60 - 65 */ > +}; > + > static void pnv_chip_power9_dt_populate(PnvChip *chip, void *fdt) > { > static const char compat[] = "ibm,power9-xscom\0ibm,xscom"; > @@ -349,7 +378,7 @@ static void pnv_chip_power9_dt_populate(PnvChip *chip, void *fdt) > offset = pnv_dt_core(chip, pnv_core, fdt); > > _FDT((fdt_setprop(fdt, offset, "ibm,pa-features", > - pa_features_207, sizeof(pa_features_207)))); > + pa_features_300, sizeof(pa_features_300)))); > } > > if (chip->ram_size) { > @@ -359,6 +388,40 @@ static void pnv_chip_power9_dt_populate(PnvChip *chip, void *fdt) > pnv_dt_lpc(chip, fdt, 0, PNV9_LPCM_BASE(chip), PNV9_LPCM_SIZE); > } > > +/* > + * Same as spapr pa_features_31 except pnv always enables CI largepages bit, > + * always disables copy/paste. > + */ > +static const uint8_t pa_features_31[] = { 74, 0, > + /* 0: MMU|FPU|SLB|RUN|DABR|NX, 1: CILRG|fri[nzpm]|DABRX|SPRG3|SLB0|PP110 */ > + /* 2: VPM|DS205|PPR|DS202|DS206, 3: LSD|URG, 5: LE|CFAR|EB|LSQ */ > + 0xf6, 0x3f, 0xc7, 0xc0, 0x00, 0xf0, /* 0 - 5 */ > + /* 6: DS207 */ > + 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 - 11 */ > + /* 16: Vector */ > + 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */ > + /* 18: Vec. Scalar, 20: Vec. XOR */ > + 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 18 - 23 */ > + /* 24: Ext. Dec, 26: 64 bit ftrs, 28: PM ftrs */ > + 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 24 - 29 */ > + /* 32: LE atomic, 34: EBB + ext EBB */ > + 0x00, 0x00, 0x80, 0x00, 0xC0, 0x00, /* 30 - 35 */ > + /* 40: Radix MMU */ > + 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 36 - 41 */ > + /* 42: PM, 44: PC RA, 46: SC vec'd */ > + 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 42 - 47 */ > + /* 48: SIMD, 50: QP BFP, 52: String */ > + 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 48 - 53 */ > + /* 54: DecFP, 56: DecI, 58: SHA */ > + 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 54 - 59 */ > + /* 60: NM atomic, 62: RNG */ > + 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 60 - 65 */ > + /* 68: DEXCR[SBHE|IBRTPDUS|SRAPD|NPHIE|PHIE] */ > + 0x00, 0x00, 0xce, 0x00, 0x00, 0x00, /* 66 - 71 */ > + /* 72: [P]HASHST/[P]HASHCHK */ > + 0x80, 0x00, /* 72 - 73 */ > +}; > + > static void pnv_chip_power10_dt_populate(PnvChip *chip, void *fdt) > { > static const char compat[] = "ibm,power10-xscom\0ibm,xscom"; > @@ -376,7 +439,7 @@ static void pnv_chip_power10_dt_populate(PnvChip *chip, void *fdt) > offset = pnv_dt_core(chip, pnv_core, fdt); > > _FDT((fdt_setprop(fdt, offset, "ibm,pa-features", > - pa_features_207, sizeof(pa_features_207)))); > + pa_features_31, sizeof(pa_features_31)))); > } > > if (chip->ram_size) { > diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c > index a684e0d9dc..abd484023a 100644 > --- a/hw/ppc/spapr.c > +++ b/hw/ppc/spapr.c > @@ -243,6 +243,7 @@ static void spapr_dt_pa_features(SpaprMachineState *spapr, > * so there isn't much need for it anyway. > */ > > + /* These should be kept in sync with pnv */ > uint8_t pa_features_206[] = { 6, 0, > 0xf6, 0x1f, 0xc7, 0x00, 0x00, 0xc0 }; > uint8_t pa_features_207[] = { 24, 0,