From: Richard Henderson <richard.henderson@linaro.org>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>, qemu-devel@nongnu.org
Cc: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>,
Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [PATCH v3 25/32] target/mips: Convert MSA COPY_U opcode to decodetree
Date: Fri, 29 Oct 2021 09:42:04 -0700 [thread overview]
Message-ID: <b706d2b5-bec1-8405-3e6c-7ca1d38c6504@linaro.org> (raw)
In-Reply-To: <20211028210843.2120802-26-f4bug@amsat.org>
On 10/28/21 2:08 PM, Philippe Mathieu-Daudé wrote:
> Convert the COPY_U opcode (Element Copy to GPR Unsigned) to
> decodetree.
>
> Since the 'n' field is a constant value, use tcg_constant_i32()
> instead of a TCG temporary.
>
> Reviewed-by: Jiaxun Yang<jiaxun.yang@flygoat.com>
> Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org>
> ---
> v2: Add NULL_IF_TARGET_MIPS32() macro, use array of 4 functions
> ---
> target/mips/tcg/msa.decode | 1 +
> target/mips/tcg/msa_translate.c | 66 ++++++++++++++++++++-------------
> 2 files changed, 41 insertions(+), 26 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2021-10-29 17:29 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-28 21:08 [PATCH v3 00/32] target/mips: Fully convert MSA opcodes to decodetree Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 01/32] target/mips: Fix MSA MADDV.B opcode Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 02/32] target/mips: Fix MSA MSUBV.B opcode Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 03/32] tests/tcg/mips: Run MSA opcodes tests on user-mode emulation Philippe Mathieu-Daudé
2021-10-29 16:12 ` Richard Henderson
2021-11-02 12:32 ` Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 04/32] target/mips: Use dup_const() to simplify Philippe Mathieu-Daudé
2021-10-29 16:13 ` Richard Henderson
2021-10-28 21:08 ` [PATCH v3 05/32] target/mips: Have check_msa_access() return a boolean Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 06/32] target/mips: Use enum definitions from CPUMIPSMSADataFormat enum Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 07/32] target/mips: Rename sa16 -> sa, bz_df -> bz -> bz_v Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 08/32] target/mips: Convert MSA LDI opcode to decodetree Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 09/32] target/mips: Convert MSA I5 instruction format " Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 10/32] target/mips: Convert MSA BIT " Philippe Mathieu-Daudé
2021-10-29 16:14 ` Richard Henderson
2021-10-28 21:08 ` [PATCH v3 11/32] target/mips: Convert MSA SHF opcode " Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 12/32] target/mips: Convert MSA I8 instruction format " Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 13/32] target/mips: Convert MSA load/store " Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 14/32] target/mips: Convert MSA 2RF " Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 15/32] target/mips: Convert MSA FILL opcode " Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 16/32] target/mips: Convert MSA 2R instruction format " Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 17/32] target/mips: Convert MSA VEC " Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 18/32] target/mips: Convert MSA 3RF instruction format to decodetree (DF_HALF) Philippe Mathieu-Daudé
2021-10-29 16:29 ` Richard Henderson
2021-10-28 21:08 ` [PATCH v3 19/32] target/mips: Convert MSA 3RF instruction format to decodetree (DF_WORD) Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 20/32] target/mips: Convert MSA 3R instruction format to decodetree (part 1/4) Philippe Mathieu-Daudé
2021-10-29 16:35 ` Richard Henderson
2021-10-29 17:23 ` Philippe Mathieu-Daudé
2021-10-29 17:50 ` Richard Henderson
2021-11-02 12:31 ` Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 21/32] target/mips: Convert MSA 3R instruction format to decodetree (part 2/4) Philippe Mathieu-Daudé
2021-10-29 16:37 ` Richard Henderson
2021-10-28 21:08 ` [PATCH v3 22/32] target/mips: Convert MSA 3R instruction format to decodetree (part 3/4) Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 23/32] target/mips: Convert MSA 3R instruction format to decodetree (part 4/4) Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 24/32] target/mips: Convert MSA ELM instruction format to decodetree Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 25/32] target/mips: Convert MSA COPY_U opcode " Philippe Mathieu-Daudé
2021-10-29 16:42 ` Richard Henderson [this message]
2021-10-28 21:08 ` [PATCH v3 26/32] target/mips: Convert MSA COPY_S and INSERT opcodes " Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 27/32] target/mips: Convert MSA MOVE.V opcode " Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 28/32] target/mips: Convert CFCMSA " Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 29/32] target/mips: Convert CTCMSA " Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 30/32] target/mips: Remove generic MSA opcode Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 31/32] target/mips: Remove one MSA unnecessary decodetree overlap group Philippe Mathieu-Daudé
2021-10-28 21:08 ` [PATCH v3 32/32] target/mips: Adjust style in msa_translate_init() Philippe Mathieu-Daudé
2021-11-02 12:36 ` [PATCH v3 00/32] target/mips: Fully convert MSA opcodes to decodetree Philippe Mathieu-Daudé
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