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From: Richard Henderson <richard.henderson@linaro.org>
To: "Alex Bennée" <alex.bennee@linaro.org>, qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [Qemu-devel] [RFC PATCH] softfloat: re-factor float to float conversions
Date: Thu, 26 Apr 2018 11:13:06 -1000	[thread overview]
Message-ID: <b71bbb8a-07de-8e00-e703-c149018c53ee@linaro.org> (raw)
In-Reply-To: <20180426154035.16155-1-alex.bennee@linaro.org>

On 04/26/2018 05:40 AM, Alex Bennée wrote:
> +    bool arm_hp = !ieee && (src_sz == 16);

Surely you should be testing the destination format.
The float16_unpack_canonical step should be handling
the (non-)special cases to get into FloatParts.

It would probably be better to invert the parameter to be arm_hp rather than
ieee; that way you don't need to test the format; it'll be implied.

> +        /* Our only option now is to "re-pack" the NaN. As the
> +         * canonilization process doesn't mess with fraction bits for
> +         * NaNs we do it all here
> +         */
> +        switch (src_sz) {
> +        case 64:
> +            break;
> +        case 32:
> +            a.frac = deposit64(0, 29, 22, extract64(a.frac, 0, 22));
> +            break;
> +        case 16:
> +            a.frac = deposit64(0, 42, 9, extract64(a.frac, 0, 9));
> +            break;
> +        default:
> +            g_assert_not_reached();
> +            break;
> +        }
> +
> +        /* Get all the frac bits we need with MSB set */

This is assuming QNaN has MSB set.  We also support SNaN with MSB set.

> +        switch (dst_sz) {
> +        case 64:
> +            a.frac = (1ULL << 51) | extract64(a.frac, 0, 51);
> +            break;
> +        case 32:
> +            a.frac = (1 << 22) | extract64(a.frac, 29, 22);
> +            break;
> +        case 16:
> +            a.frac = (1 << 9) | extract64(a.frac, 42, 9);
> +            break;
> +        default:
> +            g_assert_not_reached();
> +            break;
> +        }

This would be better with

  a.frac = a.frac << (64 - src->frac_size) >> (64 - dst->frac_size);
  a.cls = float_class_msnan;

which has no such magic numbers.

> +    } else if (a.cls == float_class_inf && arm_hp) {
> +        /* FPProcessException(FPExc_InvalidOp, fpcr); */
> +        s->float_exception_flags |= float_flag_invalid;
> +        /* Alt HP returns result = sign:Ones(M-1) - faking qnan
> +         * forces round_canonical to use frac for the final bits
> +         */
> +        a.cls = float_class_qnan;
> +        a.frac = -1;

Wow, that's... ugly.  I would really prefer that you put the correct values
into the structure.

You'll need to pass ieee into float16_round_pack_canonical anyway, since
otherwise you'll get the wrong results for e.g. 1.111p31 (overflows to inf with
ieee hp; representable with armhp).


r~

      parent reply	other threads:[~2018-04-26 21:13 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-26 15:40 [Qemu-devel] [RFC PATCH] softfloat: re-factor float to float conversions Alex Bennée
2018-04-26 15:44 ` no-reply
2018-04-26 21:13 ` Richard Henderson [this message]

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