From: Alistair <alistair23@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>,
Palmer Dabbelt <palmer@sifive.com>
Cc: Alistair Francis <Alistair.Francis@wdc.com>,
Michael Clark <mjc@sifive.com>,
QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH v1 0/5] Misc RISC-V patches
Date: Wed, 10 Oct 2018 11:14:13 -0700 [thread overview]
Message-ID: <b731830c-54c5-8ce2-462e-075188521fed@gmail.com> (raw)
In-Reply-To: <CAFEAcA_fmoBRTk0VKEjuu82eb7piCkq588+v7RT7r6f=_4=OVw@mail.gmail.com>
On 10/10/2018 11:10 AM, Peter Maydell wrote:
> On 10 October 2018 at 18:49, Palmer Dabbelt <palmer@sifive.com> wrote:
>> we should really
>> get the ball rolling on our big patch backlog.
>
> Yes, please do. Softfreeze is not all that far away and I
> would strongly prefer not to get an enormous sized pull
> request at the last minute. The ideal pattern is that
> code changes come in at a steady rate across the whole
> of the 'open' part of the development cycle.
Understandable. I'll send a PR in the next few days. I'm hoping I can
bundle it with my PCIe patches which are just waiting on some discussion.
Alistair
>
> thanks
> -- PMM
>
next prev parent reply other threads:[~2018-10-10 18:14 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-08 18:25 [Qemu-devel] [PATCH v1 0/5] Misc RISC-V patches Alistair Francis
2018-10-08 18:25 ` [Qemu-devel] [PATCH v1 1/5] RISC-V: Allow setting and clearing multiple irqs Alistair Francis
2018-10-10 20:03 ` Palmer Dabbelt
2018-10-08 18:25 ` [Qemu-devel] [PATCH v1 2/5] RISC-V: Move non-ops from op_helper to cpu_helper Alistair Francis
2018-10-10 19:07 ` Philippe Mathieu-Daudé
2018-10-10 20:03 ` Palmer Dabbelt
2018-10-08 18:25 ` [Qemu-devel] [PATCH v1 3/5] RISC-V: Update CSR and interrupt definitions Alistair Francis
2018-10-10 20:03 ` Palmer Dabbelt
2018-10-08 18:25 ` [Qemu-devel] [PATCH v1 4/5] RISC-V: Add missing free for plic_hart_config Alistair Francis
2018-10-10 19:10 ` Philippe Mathieu-Daudé
2018-10-10 20:03 ` Palmer Dabbelt
2018-10-08 18:25 ` [Qemu-devel] [PATCH v1 5/5] RISC-V: Don't add NULL bootargs to device-tree Alistair Francis
2018-10-10 19:06 ` Philippe Mathieu-Daudé
2018-10-10 20:03 ` Palmer Dabbelt
2018-10-10 17:49 ` [Qemu-devel] [PATCH v1 0/5] Misc RISC-V patches Palmer Dabbelt
2018-10-10 18:10 ` Peter Maydell
2018-10-10 18:14 ` Alistair [this message]
2018-10-10 18:22 ` Palmer Dabbelt
2018-10-11 9:34 ` Peter Maydell
2018-10-12 0:11 ` Palmer Dabbelt
2018-10-11 20:52 ` Michael Clark
2018-10-12 9:34 ` Peter Maydell
2018-10-15 20:28 ` Palmer Dabbelt
2018-10-16 8:05 ` Peter Maydell
2018-10-16 18:35 ` Palmer Dabbelt
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