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From: Richard Henderson <richard.henderson@linaro.org>
To: Xiaojuan Yang <yangxiaojuan@loongson.cn>, qemu-devel@nongnu.org
Cc: gaosong@loongson.cn, maobibo@loongson.cn,
	mark.cave-ayland@ilande.co.uk, mst@redhat.com,
	imammedo@redhat.com, ani@anisinha.ca, f4bug@amsat.org,
	peter.maydell@linaro.org
Subject: Re: [PATCH 11/11] hw/intc/loongarch_ipi: Fix mail send and any send function
Date: Mon, 4 Jul 2022 11:07:55 +0530	[thread overview]
Message-ID: <b73e54dc-a224-8413-f4cf-91da6bd346a0@linaro.org> (raw)
In-Reply-To: <20220701093407.2150607-12-yangxiaojuan@loongson.cn>

On 7/1/22 15:04, Xiaojuan Yang wrote:
> By the document of ipi mailsend device, byte is written only when the mask bit
> is 0. The original code discards mask bit and overwrite the data always, this
> patch fixes the issue.
> 
> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
> ---
>   hw/intc/loongarch_ipi.c | 45 ++++++++++++++++++++++-------------------
>   1 file changed, 24 insertions(+), 21 deletions(-)
> 
> diff --git a/hw/intc/loongarch_ipi.c b/hw/intc/loongarch_ipi.c
> index 553e88703d..e4b1fb5366 100644
> --- a/hw/intc/loongarch_ipi.c
> +++ b/hw/intc/loongarch_ipi.c
> @@ -50,35 +50,40 @@ static uint64_t loongarch_ipi_readl(void *opaque, hwaddr addr, unsigned size)
>       return ret;
>   }
>   
> -static int get_ipi_data(target_ulong val)
> +static void send_ipi_data(CPULoongArchState *env, target_ulong val, target_ulong addr)
>   {
>       int i, mask, data;
>   
> -    data = val >> 32;
> -    mask = (val >> 27) & 0xf;
> -
> +    data = address_space_ldl(&env->address_space_iocsr, addr,
> +                             MEMTXATTRS_UNSPECIFIED, NULL);
> +    mask  = 0;
>       for (i = 0; i < 4; i++) {
> -        if ((mask >> i) & 1) {
> -            data &= ~(0xff << (i * 8));
> +        /* bit 27 - 30 is mask for byte write */
> +        if (val & (0x1UL << (27 + i))) {

UL suffix is never correct, since it means different things on different hosts.
Anyway, you don't any suffix here.

How often does mask == 0, so that all of val is written?  In which case you could skip the 
load.

r~


  reply	other threads:[~2022-07-04  5:39 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-01  9:33 [PATCH v2 00/11] Fix bugs for LoongArch virt machine Xiaojuan Yang
2022-07-01  9:33 ` [PATCH 01/11] hw/rtc/ls7a_rtc: Fix uninitialied bugs and toymatch writing function Xiaojuan Yang
2022-07-04  5:13   ` Richard Henderson
2022-07-01  9:33 ` [PATCH 02/11] hw/rtc/ls7a_rtc: Fix timer call back function Xiaojuan Yang
2022-07-04  5:13   ` Richard Henderson
2022-07-01  9:33 ` [PATCH 03/11] hw/rtc/ls7a_rtc: Remove unimplemented device in realized function Xiaojuan Yang
2022-07-04  5:13   ` Richard Henderson
2022-07-01  9:34 ` [PATCH 04/11] hw/rtc/ls7a_rtc: Add reset function Xiaojuan Yang
2022-07-01  9:34 ` [PATCH 05/11] hw/rtc/ls7a_rtc: Fix rtc enable and disable function Xiaojuan Yang
2022-07-04  5:14   ` Richard Henderson
2022-07-01  9:34 ` [PATCH 06/11] hw/rtc/ls7a_rtc: Use tm struct pointer as arguments in toy_time_to_val() Xiaojuan Yang
2022-07-04  5:15   ` Richard Henderson
2022-07-01  9:34 ` [PATCH 07/11] hw/rtc/ls7a_rtc: Fix 'calculate' spelling errors Xiaojuan Yang
2022-07-04  5:15   ` Richard Henderson
2022-07-01  9:34 ` [PATCH 08/11] target/loongarch: Fix the meaning of ECFG reg's VS field Xiaojuan Yang
2022-07-04  5:18   ` Richard Henderson
2022-07-04  6:04     ` gaosong
2022-07-01  9:34 ` [PATCH 09/11] target/loongarch: Add lock when writing timer clear reg Xiaojuan Yang
2022-07-04  5:19   ` Richard Henderson
2022-07-01  9:34 ` [PATCH 10/11] hw/intc/loongarch_ipi: Fix ipi device access of 64bits Xiaojuan Yang
2022-07-04  5:28   ` Richard Henderson
2022-07-04  9:09     ` gaosong
2022-07-01  9:34 ` [PATCH 11/11] hw/intc/loongarch_ipi: Fix mail send and any send function Xiaojuan Yang
2022-07-04  5:37   ` Richard Henderson [this message]
2022-07-04  9:10     ` gaosong
2022-07-04  9:26       ` Richard Henderson
2022-07-04  5:41 ` [PATCH v2 00/11] Fix bugs for LoongArch virt machine Richard Henderson

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