qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
	qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: patches@linaro.org
Subject: Re: [Qemu-devel] [PATCH 2/8] hw/arm/armsse: Wire up the MHUs
Date: Wed, 20 Feb 2019 10:05:10 -0800	[thread overview]
Message-ID: <b7ca763d-e441-c1fb-6b66-b70155258ad2@linaro.org> (raw)
In-Reply-To: <20190219125808.25174-3-peter.maydell@linaro.org>

On 2/19/19 4:58 AM, Peter Maydell wrote:
> Create and connect the MHUs in the SSE-200.
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  include/hw/arm/armsse.h |  3 ++-
>  hw/arm/armsse.c         | 40 ++++++++++++++++++++++++++++++----------
>  2 files changed, 32 insertions(+), 11 deletions(-)


Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

> +        /*
> +         * An SSE-200 with only one CPU should have only one MHU created,
> +         * with the region where the second MHU usually is being RAZ/WI.
> +         * We don't implement that SSE-200 config; if we want to support
> +         * it then this code needs to be enhanced to handle creating the
> +         * RAZ/WI region instead of the second MHU.
> +         */
> +        assert(info->num_cpus > 1);
> +
> +        for (i = 0; i < ARRAY_SIZE(s->mhu); i++) {

Nit: x > 1 is probably better as x == ARRAY_SIZE(s->mhu).


r~

  reply	other threads:[~2019-02-20 18:05 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-19 12:58 [Qemu-devel] [PATCH 0/8] ARMSSE: Implement MHUs and dual-core capability Peter Maydell
2019-02-19 12:58 ` [Qemu-devel] [PATCH 1/8] hw/misc/armsse-mhu.c: Model the SSE-200 Message Handling Unit Peter Maydell
2019-02-20 18:00   ` Richard Henderson
2019-02-19 12:58 ` [Qemu-devel] [PATCH 2/8] hw/arm/armsse: Wire up the MHUs Peter Maydell
2019-02-20 18:05   ` Richard Henderson [this message]
2019-02-19 12:58 ` [Qemu-devel] [PATCH 3/8] target/arm/cpu: Allow init-svtor property to be set after realize Peter Maydell
2019-02-20 18:15   ` Richard Henderson
2019-02-20 19:13     ` Peter Maydell
2019-02-19 12:58 ` [Qemu-devel] [PATCH 4/8] target/arm/arm-powerctl: Add new arm_set_cpu_on_and_reset() Peter Maydell
2019-02-20 18:20   ` Richard Henderson
2019-02-19 12:58 ` [Qemu-devel] [PATCH 5/8] hw/misc/iotkit-sysctl: Correct typo in INITSVTOR0 register name Peter Maydell
2019-02-20 18:22   ` Richard Henderson
2019-02-19 12:58 ` [Qemu-devel] [PATCH 6/8] hw/arm/iotkit-sysctl: Add SSE-200 registers Peter Maydell
2019-02-20 18:24   ` Richard Henderson
2019-02-19 12:58 ` [Qemu-devel] [PATCH 7/8] hw/arm/iotkit-sysctl: Implement CPUWAIT and INITSVTOR* Peter Maydell
2019-02-20 18:28   ` Richard Henderson
2019-02-19 12:58 ` [Qemu-devel] [PATCH 8/8] hw/arm/armsse: Unify init-svtor and cpuwait handling Peter Maydell
2019-02-20 18:32   ` Richard Henderson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=b7ca763d-e441-c1fb-6b66-b70155258ad2@linaro.org \
    --to=richard.henderson@linaro.org \
    --cc=patches@linaro.org \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).