Re: [PATCH] target/arm: Don't assert() for ISB/SB inside IT block

[Richard Henderson <richard.henderson@linaro.org>]

On 5/1/25 05:55, Peter Maydell wrote:
> (NB: the TCG optimizer doesn't optimize out the jump-to-next, but
> we can't really avoid emitting it because we don't know at the
> point we're emitting the handling for the condexec check whether
> this insn is going to happen to be a nop for us or not.)

Heh.  For some reason I only fold unconditional branch-to-next.
I'll fix this.  Anyway,

> 
> Cc: qemu-stable@nongnu.org
> Fixes: https://gitlab.com/qemu-project/qemu/-/issues/2942
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>   target/arm/tcg/translate.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c
> index 88df9c482ab..e773ab72685 100644
> --- a/target/arm/tcg/translate.c
> +++ b/target/arm/tcg/translate.c
> @@ -7760,7 +7760,8 @@ static bool arm_check_ss_active(DisasContext *dc)
>   
>   static void arm_post_translate_insn(DisasContext *dc)
>   {
> -    if (dc->condjmp && dc->base.is_jmp == DISAS_NEXT) {
> +    if (dc->condjmp &&
> +        (dc->base.is_jmp == DISAS_NEXT || dc->base.is_jmp == DISAS_TOO_MANY)) {
>           if (dc->pc_save != dc->condlabel.pc_save) {
>               gen_update_pc(dc, dc->condlabel.pc_save - dc->pc_save);
>           }

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~