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[76.14.228.138]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-842b2b3e80fsm27968327a12.31.2025.01.08.13.23.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 08 Jan 2025 13:23:47 -0800 (PST) Message-ID: Date: Wed, 8 Jan 2025 13:23:44 -0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 02/81] tcg: Replace TCGOP_VECL with TCGOP_TYPE To: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Cc: pierrick.bouvier@linaro.org References: <20250107080112.1175095-1-richard.henderson@linaro.org> <20250107080112.1175095-3-richard.henderson@linaro.org> <1271a667-845a-458b-b8e8-b3a9a75fafc3@linaro.org> Content-Language: en-US From: Richard Henderson In-Reply-To: <1271a667-845a-458b-b8e8-b3a9a75fafc3@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 1/8/25 09:39, Philippe Mathieu-Daudé wrote: > On 7/1/25 08:59, Richard Henderson wrote: >> In the replacement, drop the TCGType - TCG_TYPE_V64 adjustment, >> except for the call to tcg_out_vec_op.  Pass type to tcg_gen_op[1-6], >> so that all integer opcodes gain the type. >> >> Signed-off-by: Richard Henderson >> --- >>   include/tcg/tcg.h      |   2 +- >>   tcg/tcg-internal.h     |  13 ++--- >>   tcg/optimize.c         |  10 +--- >>   tcg/tcg-op-ldst.c      |  26 ++++++---- >>   tcg/tcg-op-vec.c       |   8 +-- >>   tcg/tcg-op.c           | 113 +++++++++++++++++++++++------------------ >>   tcg/tcg.c              |  11 ++-- >>   docs/devel/tcg-ops.rst |  15 +++--- >>   8 files changed, 105 insertions(+), 93 deletions(-) > > >> @@ -3320,7 +3333,7 @@ void tcg_gen_exit_tb(const TranslationBlock *tb, unsigned idx) >>           tcg_debug_assert(idx == TB_EXIT_REQUESTED); >>       } >> -    tcg_gen_op1i(INDEX_op_exit_tb, val); >> +    tcg_gen_op1i(INDEX_op_exit_tb, 0, val); > > Having TCG_TYPE_I32 = 0 is confusing. > > Should we define TCG_TYPE_VOID = 0 first, shifting all other types > (and updating tcg_type_size())? No. E.g. tcg/aarch64/tcg-target.c.inc: /* We're going to re-use TCGType in setting of the SF bit, which controls the size of the operation performed. If we know the values match, it makes things much cleaner. */ QEMU_BUILD_BUG_ON(TCG_TYPE_I32 != 0 || TCG_TYPE_I64 != 1); Obviously this value is never used for INDEX_op_exit_tb (and others). If you really think it's important, we could add VOID as another value. But I think that might be more confusing than anything else. So far we're restricted to integer and vector types. If we add a third classification, we're going to want to adjust all of the checks everywhere. r~