* [PATCH v2] target/hppa: Generate illegal instruction exception for 64-bit instructions
@ 2022-09-28 18:49 Helge Deller
2022-09-28 21:05 ` Richard Henderson
0 siblings, 1 reply; 2+ messages in thread
From: Helge Deller @ 2022-09-28 18:49 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
Qemu currently emulates a 32-bit CPU only, and crashes with this error
when it faces a 64-bit load (e.g. "ldd 0(r26),r0") or a 64-bit store
(e.g. "std r26,0(r26)") instruction in the guest:
ERROR:../qemu/tcg/tcg-op.c:2822:tcg_canonicalize_memop: code should not be reached
Add checks for 64-bit sizes and generate an illegal instruction
exception if necessary.
Signed-off-by: Helge Deller <deller@gmx.de>
---
v2: Move checks to trans_ld() and trans_st() as suggested by Richard
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 8b861957e0..a32036c4ce 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -2899,14 +2899,22 @@ static bool trans_cmpiclr(DisasContext *ctx, arg_rri_cf *a)
static bool trans_ld(DisasContext *ctx, arg_ldst *a)
{
- return do_load(ctx, a->t, a->b, a->x, a->scale ? a->size : 0,
+ if (unlikely(TARGET_REGISTER_BITS == 32 && a->size > MO_32)) {
+ return gen_illegal(ctx);
+ } else {
+ return do_load(ctx, a->t, a->b, a->x, a->scale ? a->size : 0,
a->disp, a->sp, a->m, a->size | MO_TE);
+ }
}
static bool trans_st(DisasContext *ctx, arg_ldst *a)
{
assert(a->x == 0 && a->scale == 0);
- return do_store(ctx, a->t, a->b, a->disp, a->sp, a->m, a->size | MO_TE);
+ if (unlikely(TARGET_REGISTER_BITS == 32 && a->size > MO_32)) {
+ return gen_illegal(ctx);
+ } else {
+ return do_store(ctx, a->t, a->b, a->disp, a->sp, a->m, a->size | MO_TE);
+ }
}
static bool trans_ldc(DisasContext *ctx, arg_ldst *a)
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v2] target/hppa: Generate illegal instruction exception for 64-bit instructions
2022-09-28 18:49 [PATCH v2] target/hppa: Generate illegal instruction exception for 64-bit instructions Helge Deller
@ 2022-09-28 21:05 ` Richard Henderson
0 siblings, 0 replies; 2+ messages in thread
From: Richard Henderson @ 2022-09-28 21:05 UTC (permalink / raw)
To: Helge Deller, qemu-devel
On 9/28/22 11:49, Helge Deller wrote:
> Qemu currently emulates a 32-bit CPU only, and crashes with this error
> when it faces a 64-bit load (e.g. "ldd 0(r26),r0") or a 64-bit store
> (e.g. "std r26,0(r26)") instruction in the guest:
>
> ERROR:../qemu/tcg/tcg-op.c:2822:tcg_canonicalize_memop: code should not be reached
>
> Add checks for 64-bit sizes and generate an illegal instruction
> exception if necessary.
>
> Signed-off-by: Helge Deller <deller@gmx.de>
> ---
> v2: Move checks to trans_ld() and trans_st() as suggested by Richard
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2022-09-28 21:37 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-09-28 18:49 [PATCH v2] target/hppa: Generate illegal instruction exception for 64-bit instructions Helge Deller
2022-09-28 21:05 ` Richard Henderson
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).