From: Thomas Huth <thuth@redhat.com>
To: Alistair Francis <alistair23@gmail.com>,
qemu-devel@nongnu.org,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Cc: Alistair Francis <alistair.francis@wdc.com>,
Greg Kurz <groug@kaod.org>,
Christian Schoenebeck <qemu_oss@crudebyte.com>,
Peter Maydell <peter.maydell@linaro.org>
Subject: Re: [PULL 20/34] tests/libqos: add riscv/virt machine nodes
Date: Mon, 25 Mar 2024 10:20:04 +0100 [thread overview]
Message-ID: <b85c8451-57e0-49aa-a7c4-28ae8bf08bf9@redhat.com> (raw)
In-Reply-To: <20240308111152.2856137-21-alistair.francis@wdc.com>
On 08/03/2024 12.11, Alistair Francis wrote:
> From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
>
> Add a RISC-V 'virt' machine to the graph. This implementation is a
> modified copy of the existing arm machine in arm-virt-machine.c
>
> It contains a virtio-mmio and a generic-pcihost controller. The
> generic-pcihost controller hardcodes assumptions from the ARM 'virt'
> machine, like ecam and pio_base addresses, so we'll add an extra step to
> set its parameters after creating it.
>
> Our command line is incremented with 'aclint' parameters to allow the
> machine to run MSI tests.
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> Acked-by: Alistair Francis <alistair.francis@wdc.com>
> Acked-by: Thomas Huth <thuth@redhat.com>
> Message-ID: <20240217192607.32565-7-dbarboza@ventanamicro.com>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
Hi!
I noticed that "make check SPEED=slow" is now failing on the qos-test with
both, qemu-system-riscv32 and qemu-system-riscv64. Seems like it fails with
the virtio-9p test, when I run the qos-test manually, I get:
$ MALLOC_PERTURB_=21 V=2 QTEST_QEMU_BINARY=./qemu-system-riscv64 \
tests/qtest/qos-test -m slow
...
# Start of local tests
# starting QEMU: exec ./qemu-system-riscv64 -qtest
unix:/tmp/qtest-211303.sock -qtest-log /dev/null -chardev
socket,path=/tmp/qtest-211303.qmp,id=char0 -mon chardev=char0,mode=control
-display none -audio none -M virt,aclint=on,aia=aplic-imsic -fsdev
local,id=fsdev0,path='/home/thuth/tmp/qemu-build/qtest-9p-local-MBCML2',security_model=mapped-xattr
-device virtio-9p-pci,fsdev=fsdev0,addr=04.0,mount_tag=qtest -accel qtest
ok 168
/riscv64/virt/generic-pcihost/pci-bus-generic/pci-bus/virtio-9p-pci/virtio-9p/virtio-9p-tests/local/config
Received response 7 (RLERROR) instead of 73 (RMKDIR)
Rlerror has errno 17 (File exists)
**
ERROR:../../devel/qemu/tests/qtest/libqos/virtio-9p-client.c:275:v9fs_req_recv:
assertion failed (hdr.id == id): (7 == 73)
not ok
/riscv64/virt/generic-pcihost/pci-bus-generic/pci-bus/virtio-9p-pci/virtio-9p/virtio-9p-tests/local/create_dir
-
ERROR:../../devel/qemu/tests/qtest/libqos/virtio-9p-client.c:275:v9fs_req_recv:
assertion failed (hdr.id == id): (7 == 73)
Bail out!
Aborted (core dumped)
Could you please have a look? ... or if it is too cumbersome to fix, could
we please always skip the virtio-9p local tests on riscv ?
Thomas
next prev parent reply other threads:[~2024-03-25 9:21 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-08 11:11 [PULL 00/34] riscv-to-apply queue Alistair Francis
2024-03-08 11:11 ` [PULL 01/34] target/riscv: Update $ra with current $pc in trans_cm_jalt() Alistair Francis
2024-03-08 11:11 ` [PULL 02/34] hw/arm/virt-acpi-build.c: Migrate SPCR creation to common location Alistair Francis
2024-03-08 11:11 ` [PULL 03/34] hw/riscv/virt-acpi-build.c: Generate SPCR table Alistair Francis
2024-03-08 11:11 ` [PULL 04/34] hw: riscv: Allow large kernels to boot by moving the initrd further away in RAM Alistair Francis
2024-03-08 11:11 ` [PULL 05/34] linux-user/riscv: Add Zicboz extensions to hwprobe Alistair Francis
2024-03-08 11:11 ` [PULL 06/34] linux-user/riscv: Sync hwprobe keys with Linux Alistair Francis
2024-03-08 11:11 ` [PULL 07/34] target/riscv/tcg: set 'mmu' with 'satp' in cpu_set_profile() Alistair Francis
2024-03-08 11:11 ` [PULL 08/34] target/riscv: add riscv,isa to named features Alistair Francis
2024-03-08 11:11 ` [PULL 09/34] target/riscv: add remaining " Alistair Francis
2024-03-11 13:47 ` Clément Chigot
2024-03-11 14:39 ` Daniel Henrique Barboza
2024-03-12 9:26 ` Daniel Henrique Barboza
2024-03-08 11:11 ` [PULL 10/34] target/riscv: Reset henvcfg to zero Alistair Francis
2024-03-08 11:11 ` [PULL 11/34] target/riscv: Gate hardware A/D PTE bit updating Alistair Francis
2024-03-08 11:11 ` [PULL 12/34] target/riscv: Promote svade to a normal extension Alistair Francis
2024-03-08 11:11 ` [PULL 13/34] target/riscv: FIX xATP_MODE validation Alistair Francis
2024-03-08 11:11 ` [PULL 14/34] target/riscv: UPDATE xATP write CSR Alistair Francis
2024-03-08 11:11 ` [PULL 15/34] target/riscv: Add missing include guard in pmu.h Alistair Francis
2024-03-08 11:11 ` [PULL 16/34] hw/riscv/virt-acpi-build.c: Add SRAT and SLIT ACPI tables Alistair Francis
2024-03-08 11:11 ` [PULL 17/34] hw/riscv/virt.c: create '/soc/pci@...' fdt node earlier Alistair Francis
2024-03-08 11:11 ` [PULL 18/34] hw/riscv/virt.c: add virtio-iommu-pci hotplug support Alistair Francis
2024-03-08 11:11 ` [PULL 19/34] hw/riscv/virt.c: make aclint compatible with 'qtest' accel Alistair Francis
2024-03-08 11:11 ` [PULL 20/34] tests/libqos: add riscv/virt machine nodes Alistair Francis
2024-03-25 9:20 ` Thomas Huth [this message]
2024-03-25 12:35 ` Daniel Henrique Barboza
2024-03-25 13:25 ` Christian Schoenebeck
2024-03-25 13:46 ` Thomas Huth
2024-03-25 13:44 ` Thomas Huth
2024-03-08 11:11 ` [PULL 21/34] RISC-V: Add support for Ztso Alistair Francis
2024-03-08 11:11 ` [PULL 22/34] linux-user/riscv: Add Ztso extension to hwprobe Alistair Francis
2024-03-08 11:11 ` [PULL 23/34] tests: riscv64: Use 'zfa' instead of 'Zfa' Alistair Francis
2024-03-08 11:11 ` [PULL 24/34] linux-headers: Update to Linux v6.8-rc6 Alistair Francis
2024-03-08 11:11 ` [PULL 25/34] target/riscv/kvm: update KVM exts to Linux 6.8 Alistair Francis
2024-03-08 11:11 ` [PULL 26/34] target/riscv: move ratified/frozen exts to non-experimental Alistair Francis
2024-03-08 11:11 ` [PULL 27/34] target/riscv: mcountinhibit, mcounteren, scounteren, hcounteren is 32-bit Alistair Francis
2024-03-08 11:11 ` [PULL 28/34] trans_rvv.c.inc: mark_vs_dirty() before loads and stores Alistair Francis
2024-03-08 11:11 ` [PULL 29/34] trans_rvv.c.inc: remove 'is_store' bool from load/store fns Alistair Francis
2024-03-08 11:11 ` [PULL 30/34] target/riscv: Fix shift count overflow Alistair Francis
2024-03-08 11:11 ` [PULL 31/34] hw/intc/riscv_aplic: Fix setipnum_le write emulation for APLIC MSI-mode Alistair Francis
2024-03-08 11:11 ` [PULL 32/34] hw/intc/riscv_aplic: Fix in_clrip[x] read emulation Alistair Francis
2024-03-08 11:11 ` [PULL 33/34] target/riscv: Fix privilege mode of G-stage translation for debugging Alistair Francis
2024-03-08 11:11 ` [PULL 34/34] target/riscv: fix ACPI MCFG table Alistair Francis
2024-03-08 16:48 ` [PULL 00/34] riscv-to-apply queue Peter Maydell
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