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[174.21.72.5]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1f44c759e56sm64673085ad.7.2024.05.27.09.20.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 27 May 2024 09:20:47 -0700 (PDT) Message-ID: Date: Mon, 27 May 2024 09:20:44 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PULL 17/20] target/arm: Do memory type alignment check when translation disabled To: Bernhard Beschow , Peter Maydell Cc: qemu-devel@nongnu.org References: <20240305135237.3111642-1-peter.maydell@linaro.org> <20240305135237.3111642-18-peter.maydell@linaro.org> <72ED7A80-9EA7-4FF6-BE29-9583587985C7@gmail.com> Content-Language: en-US From: Richard Henderson In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 5/27/24 08:29, Bernhard Beschow wrote: > I think the kernel's output indicates that the MMU is active: > > [7e849b05] *pgd=2c552831, *pte=109eb34f, *ppte=109eb83f > > AFAIU, the value in brackets is a virtual address while the pte's are physical ones. Furthermore, the `info mtree` QMP command tells that the physical addresses are RAM addresses: > > 0000000010000000-000000002fffffff (prio 0, ram): sabrelite.ram > > So I think we can conclude this to be "normal memory" to speak in ARM terms. Normal and Device are attributes on the page table entry. See section G5.7 Memory region attributes in the Arm ARM. But it's unlikely that the Linux kernel has messed this up, even back in 4.x days. If you want to make any progress, you'll have to share a test case. r~