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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
	qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: "Cédric Le Goater" <clg@kaod.org>, "Peter Xu" <peterx@redhat.com>,
	"Fabiano Rosas" <farosas@suse.de>
Subject: Re: [PATCH 08/13] hw/arm/mps3r: Initial skeleton for mps3-an536 board
Date: Wed, 7 Feb 2024 10:02:45 +0100	[thread overview]
Message-ID: <b8fbf313-1b24-4cf3-b5c1-f9289b413a75@linaro.org> (raw)
In-Reply-To: <20240206132931.38376-9-peter.maydell@linaro.org>

On 6/2/24 14:29, Peter Maydell wrote:
> The AN536 is another FPGA image for the MPS3 development board. Unlike
> the existing FPGA images we already model, this board uses a Cortex-R
> family CPU, and it does not use any equivalent to the M-profile
> "Subsystem for Embedded" SoC-equivalent that we model in hw/arm/armsse.c.
> It's therefore more convenient for us to model it as a completely
> separate C file.
> 
> This commit adds the basic skeleton of the board model, and the
> code to create all the RAM and ROM. We assume that we're probably
> going to want to add more images in future, so use the same
> base class/subclass setup that mps2-tz.c uses, even though at
> the moment there's only a single subclass.
> 
> Following commits will add the CPUs and the peripherals.
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>   MAINTAINERS                             |   3 +-
>   configs/devices/arm-softmmu/default.mak |   1 +
>   hw/arm/mps3r.c                          | 239 ++++++++++++++++++++++++
>   hw/arm/Kconfig                          |   5 +
>   hw/arm/meson.build                      |   1 +
>   5 files changed, 248 insertions(+), 1 deletion(-)
>   create mode 100644 hw/arm/mps3r.c


> +/*
> + * The MPS3 DDR is 3GiB, but on a 32-bit host QEMU doesn't permit
> + * emulation of that much guest RAM, so artificially make it smaller.
> + */
> +#if HOST_LONG_BITS == 32
> +#define MPS3_DDR_SIZE (1 * GiB)
> +#else
> +#define MPS3_DDR_SIZE (3 * GiB)
> +#endif

Generically, can we migrate a VM started on a 32-bit host to a 64-bit
one?

> +static void mps3r_set_default_ram_info(MPS3RMachineClass *mmc)
> +{
> +    /*
> +     * Set mc->default_ram_size and default_ram_id from the
> +     * information in mmc->raminfo.
> +     */
> +    MachineClass *mc = MACHINE_CLASS(mmc);
> +    const RAMInfo *p;
> +
> +    for (p = mmc->raminfo; p->name; p++) {
> +        if (p->mrindex < 0) {
> +            /* Found the entry for "system memory" */
> +            mc->default_ram_size = p->size;
> +            mc->default_ram_id = p->name;

Nice.

> +            return;
> +        }
> +    }
> +    g_assert_not_reached();
> +}

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



  parent reply	other threads:[~2024-02-07  9:03 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-06 13:29 [PATCH 00/13] hw/arm: Implement new machine mps3-an536 (Cortex-R52 MPS3 AN536 FPGA image) Peter Maydell
2024-02-06 13:29 ` [PATCH 01/13] target/arm: Use new CBAR encoding for all v8 CPUs, not all aarch64 CPUs Peter Maydell
2024-02-06 20:34   ` Richard Henderson
2024-02-06 21:00     ` Peter Maydell
2024-02-06 13:29 ` [PATCH 02/13] target/arm: The Cortex-R52 has a read-only CBAR Peter Maydell
2024-02-06 20:38   ` Richard Henderson
2024-02-06 21:02     ` Peter Maydell
2024-02-06 13:29 ` [PATCH 03/13] target/arm: Add Cortex-R52 IMPDEF sysregs Peter Maydell
2024-02-06 22:21   ` Richard Henderson
2024-02-06 13:29 ` [PATCH 04/13] target/arm: Allow access to SPSR_hyp from hyp mode Peter Maydell
2024-02-06 21:46   ` Richard Henderson
2024-02-06 13:29 ` [PATCH 05/13] hw/misc/mps2-scc: Fix condition for CFG3 register Peter Maydell
2024-02-06 15:52   ` Philippe Mathieu-Daudé
2024-02-06 21:47   ` Richard Henderson
2024-02-06 13:29 ` [PATCH 06/13] hw/misc/mps2-scc: Factor out which-board conditionals Peter Maydell
2024-02-06 15:56   ` Philippe Mathieu-Daudé
2024-02-06 21:47   ` Richard Henderson
2024-02-07  8:47   ` Philippe Mathieu-Daudé
2024-02-06 13:29 ` [PATCH 07/13] hw/misc/mps2-scc: Make changes needed for AN536 FPGA image Peter Maydell
2024-02-06 21:50   ` Richard Henderson
2024-02-07  8:56   ` Philippe Mathieu-Daudé
2024-02-06 13:29 ` [PATCH 08/13] hw/arm/mps3r: Initial skeleton for mps3-an536 board Peter Maydell
2024-02-06 19:21   ` Philippe Mathieu-Daudé
2024-02-06 20:57     ` Peter Maydell
2024-02-07  9:02   ` Philippe Mathieu-Daudé [this message]
2024-02-08 17:02     ` Peter Maydell
2024-02-08 17:07       ` Cédric Le Goater
2024-02-08 18:19         ` Philippe Mathieu-Daudé
2024-02-06 13:29 ` [PATCH 09/13] hw/arm/mps3r: Add CPUs, GIC, and per-CPU RAM Peter Maydell
2024-02-15 17:53   ` Alex Bennée
2024-02-06 13:29 ` [PATCH 10/13] hw/arm/mps3r: Add UARTs Peter Maydell
2024-02-06 16:44   ` Philippe Mathieu-Daudé
2024-02-06 13:29 ` [PATCH 11/13] hw/arm/mps3r: Add GPIO, watchdog, dual-timer, I2C devices Peter Maydell
2024-02-06 16:47   ` Philippe Mathieu-Daudé
2024-02-06 13:29 ` [PATCH 12/13] hw/arm/mps3r: Add remaining devices Peter Maydell
2024-02-06 16:49   ` Philippe Mathieu-Daudé
2024-02-06 13:29 ` [PATCH 13/13] docs: Add documentation for the mps3-an536 board Peter Maydell
2024-02-06 16:50   ` Philippe Mathieu-Daudé

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